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June 5, 1997
Simulation
establishes high-power
BGAs' thermal performance
DR PAVEL VALENTA, ALCATEL SEL, GERMANY
Thermal simulation shows how pc-board copper
layers and air velocity cause wide variations in the junction-to-air
thermal resistance (uppercase thetaj-a) of
225- and 352-pin-out BGA devices that dissipate up to 6W.
Physical measurements confirm simulation results.
The
increasing need for cost reduction and miniaturisation,
particularly in telecommunications-transmission and
switching systems, demands alternative IC packages to the
ceramic-pin-grid-array (CPGA) and ceramic-quad-flatpack
(CQFP) package types currently in use. Standard
fine-pitch SMD plastic quad flatpacks (PQFPs) do not
provide a suitable alternative because the thermal
conductivity of the IC encapsulant limits dissipation to
2W max.
Newer
enhanced quad flatpacks (QFPs) with embedded heat
spreaders or exposed heat slugs dissipate upwards of
1.5W; but, the ball-grid-array (BGA) family offers a more
cost-effective alternative that also accommodates higher
I/O connections. A standard plastic BGA225, for example,
provides 225 I/O connections and dissipates up to 4W.
Enhanced BGAs provide even more connections and dissipate
more power. Amkor Electronics' SBGA352 Super-BGA package
provides 352 connections and dissipates up to 6W.
Whichever BGA
you use, designing-in parts associated with such power
concentrations demands careful thermal management. To
establish an IC's heat-dissipation limits for any
particular application, you cannot simply use the thermal
resistance (uppercase theta) values that IC or package
manufacturers provide; manufacturers measure these values
with components assembled on a standard test fixture--and
in a standard environment. As a result, you'll often find
difficulty in obtaining more than a single
thermal-resistance value.
To overcome
this lack of data, you could make your own time-consuming
measurements, but today's thermal-simulation tools
provide results just as accurately (see box, "Verifying
thermal simulation of a BGA225'') and give you much greater
design flexibility. Thermal-simulation tools, such as
Flomerics' Flotherm, can provide accurate predictions;
but, as with any simulation, results depend on your
ability to build models that embody all relevant effects.
The thermal
performance of any component depends not only on the
properties of the package but also on the environment in
which the component operates. For investigating the
thermal performance of standard plastic BGAs (PBGAs) or
SuperBGA packs in a typical communications-equipment
environment, consider some key parameters:
Thermal
coupling set by vias on the pc board
Heat-spreading
ability set by thickness of copper layers on or
in the pc board
The
IC's local thermal environment set by the heat
dissipation of neighbouring components on the pc
board
The
pc-board system thermal environment set by the
heat dissipation of neighbouring boards
Air
velocity set by natural or forced convection.
Building a
PBGA225 model
In
constructing a simulation model of a PBGA225, you'll have
to model three blocks: the substrate, the chip, and the
plastic moulding. Table 1 shows the values of thermal
conductivity assigned to the elements of these blocks.
The example simulation ignores the effects of bond wires
and the chip bonding glue. The simulation of the 225
solder balls uses rectangular cuboid elements with the
same cross-sectional area as the round solder balls.
The
simulation of the pc board with its embedded copper
layers also uses cuboid elements. Again, see Table 1, which shows thermal-conductivity
values. The thermal vias in the pc board appear in the
model as blocks embedded in the board directly underneath
the central solder balls. The dimensions of the vias
align exactly with the solder balls to simplify the
computational grid for the overall simulation.
 The simulation assumes symmetry
along a central and vertical axis of the overall model (Figure 1). This assumption allows you to simulate
one-half of the overall model to reduce computation time
(Reference
1). The
dimensions of the computational domain align exactly with
the pc-board dimensions and extend 30 mm from each side
of the pc board's surfaces. This space allows adequate
air-velocity distribution over the component and board
surfaces. The simulation applies boundary conditions for
a single board, namely free stream boundaries for the top
and side walls of the computational domain and radiation
exchange with ambient environment. The bottom of the
computational domain also includes an external fan to
simulate forced cooling. The emissivity (lowercase
epsilon)
of the component and pc-board surfaces are lowercase
epsilon=0.9
and lowercase
epsilon=0.8,
respectively.
Before you
can perform the simulation of the package and pc-board
assembly, you should vary the computational grid density
inside the component and air space close to the surfaces
to determine a sufficient nodalisation. Sufficient
nodalisation means your grid becomes insensitive to
further refinement. For example, proceed with progressive
grid refinement until computed temperature values
stabilise.
In this
example, the grid has a total of 96,063 cells and results
in a computing time of approximately 180 minutes on a
SPARC Ultra1 workstation. The grid spacing near the
component and board surfaces is nonuniform, ensuring that
the simulation sufficiently resolves the boundary layers.
Due to the large number of solder balls, you don't need
to add grid cells inside the component parallel to the
pc-board plane. However, you should set five additional
cells across the component thickness to capture the
temperature gradients within the component.
The
contribution of radiation to heat transfer depends on the
pc board's thermal environment. If you assume the board
is in a rack with neighbouring boards of similar
temperature, then you can ignore the contribution of
radiation. However, if you have a single board operating
in a dissimilar thermal environment, you cannot ignore
the radiation exchange with that environment.
During
simulation, you can evaluate the contribution of
radiation exchange by simply deactivating the radiation
element in the simulation model and recalculating. In the
example, deactivating the external radiation from the top
surface of the PBGA225 increases the thermal resistance (uppercase
thetaj-a)
by just 4%. Deactivating both component and board
radiation elements increases uppercase thetaj-a by 15%.
You can
represent the heat generated in the die by modelling
either the whole chip as a uniform heat source or by
creating a thin-layer planar heat source underneath the
chip's surface. The example produces nearly the same
calculated chip temperature in either case. Silicon's
high thermal conductivity produces a very small thermal
resistance across the chip's thickness and ensures a
uniform temperature distribution in the die. The example
uses the maximum chip temperature for calculating thermal
resistance; using the average chip temperature produces a
thermal resistance that measures approx
imately 3% lower.
 The example simulation runs for
different inputs of heat dissipation and air velocity;
and, it outputs the calculated junction, package, and
board temperatures as Figures 2 and  3 show. They also show how the calculated
simulation results compare with measured results
(see box, "Verifying thermal
simulation of a BGA225'').
 Using the experience gained by
modelling a PBGA225 package enables you to proceed to a
simulation of a higher power SuperBGA352 (SBGA352). This
second example looks specifically at heat-dissipation
limits of the package mounted on various multilayer
boards with different copper layer structures. Figure 4 shows package details. You can see that the
chip bonds directly to the underside of a copper heat
spreader. In fact, most of the package body consists of
copper, which provides a high-conductivity thermal path
to the solder balls (Reference 2). The solder balls, in turn,
conduct heat to copper planes in the motherboard.
In this
example, the simulation model of the package consists of
five blocks: copper heat spreader, copper ring,
multilayer substrate, chip, and moulding. Table 2 shows the corresponding dimensions
and thermal conductivities of each block. The model
treats the adhesive junction as 2-D plates. As with the
PBGA225, the model ignores the effects of bond wires.
Again, rectangular cuboids represent the solder balls,
which number 352 in this example. The data used for the
model comes partly from the component manufacturer's
information and partly from in-house analysis.
This second
simulation example runs with the SBGA352 package on pc
boards of the same size (232×159 mm) but with three
different board structures. The simulation also studies
thermal performance for a range of IC power dissipations
at different air speeds. As before, the simulation
assumes the thermal environment of a rack, with
neighbouring boards at 70°C for example, so that results
ignore the effects of radiation heat transfer.
The
simulation considers thermal performance using three
pc-board structures:
A
two-layer board, 1.6 mm thick with two 35-µm
signal planes.
An
eight-layer board, 1.6 mm thick with four
17.5-µm signal planes and four 17.5-µm ground
planes.
A
metal core board, 3.2 mm thick with two 400-µm
planes and eight 35-µm signal planes.
Also, as
before, cuboid elements represent the pc boards, although
for this example the model treats each copper plane
separately. Values of effective thermal conductivity for
individual copper layers are estimates based on the share
of overall copper. For example, the simulation uses a
thermal conductivity of 150 W/mK for a signal plane and
300 W/mK for a ground plane. The model assumes the solder
balls connect only to the upper signal plane and that
there are no thermal vias to the ground planes.
Run an
SBGA352 simulation
 Figure 5 shows the junction-to-ambient
thermal-resistance results the simulation produced. The figure clearly shows the wide range of uppercase
thetaj-a
values (6 to 20°C/W) that correspond to the different
board structures and environments. The range proves,
beyond doubt, that you cannot characterise a package's
thermal performance by a single uppercase
thetaj-a
value.
The analysis
also indicates the difficulty you'll have in predicting
component temperatures on a fully populated board. First,
neighbouring hot components cause an increase in the
board temperature. This increase means the cooling
capability of the board decreases, and component
temperatures in general are higher than for a single
component.  And, second, this effect becomes
more significant with increasing copper thickness in the
board. In this case, you have to conduct a simulation
with more detailed models that take into account the
board's overall thermal environment.
 Figures 6 and 7 show heat-flux distributions for
different areas of assemblies using three types of pc
board and provide the basis of a thermal budget for a
design.  Figure 8, which graphically depicts temperature
contours, shows one example of several possible
simulation outputs.
References
Burgos,
J, V P Manno, and K Azar, "Achieving
Accurate Thermal Characterisation Using a CFD
Code--A Case Study of Plastic Packages," IEEE
Transactions on Components, Packaging and
Manufacturing Technology, Part 1, Volume 18,
No. 4, 1995, pg 732 to 738.
Guenin,
B M, R C Marrs, and R J Molnar, "Analysis of
a Thermally Enhanced Ball Grid Array
Package," IEEE Transactions on
Components, Packaging and Manufacturing
Technology, Part 1, Volume 18, No. 4, 1995,
pg 749 to 757.
Acknowledgements
Thanks to E
Schworm at Siemens for setting up the models and running
simulations using Flomerics' Flotherm software. This work
was part of the "Simulation and Testing
Methods" (SIMTEST) project supported by the German
Federal Ministry of Education, Science, Research and
Technology.
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