June 19, 1997

LVDS: power-miser angel, interconnect demon

Bill Travis, Senior Technical Editor

High data rates and limited signal swing conspire to make the design and characterization of LVDS interconnect systems a tricky proposition.

In RAID and other digital systems that need extremely high-speed data transmission, low-voltage differential signaling (LVDS) offers the alluring combination of low power consumption, high noise immunity, and inexpensive cabling. However, at data rates of several hundred megabits per second, you must be wary of such interconnect problems as impedance mismatch and skew. These problems, if untreated, can cause signal loss and data corruption.

The new SPI-2 (Ultra-2 and -3 SCSI) standard defines high-density connectors and terminal-power distribution. In SPI-2 interconnect systems, the transmission-line (and required termination) impedance is 100 to 110Ohm. Using multilayer pc boards, you can easily achieve and control this impedance. However, you can run into trouble when you must effect board-to-cable or board-to-board connections. Parasitics in the connectors can cause discontinuities in the all-important termination impedance.

To combat these problems, you should understand characterization techniques for LVDS interconnect systems, as the following examples describe. In one example, North East Systems Associates (NESA), a consulting company, assisted Siemens Corp in characterizing the SpeedPac backplane-connector system (Reference 1). References 2 and 3 describe the product and the testing methodology and results.

The SpeedPac system (Figure 1) uses balanced, twinax lines in a metal housing to allow data rates as high as 2.5 Gbps, with signal rise times as fast as 50 psec. The twinax lines form completely balanced transmission lines from striplines in the daughtercard, through the connector, and into the backplane. Because the system uses LVDS, it does not rely on a ground reference; the result is lower noise.

The signal pairs in a SpeedPac connector are within separate channels and are surrounded by a metal housing to ensure isolation. The grounding structure of the connector connects to both boards, aided by grounding strips sandwiched between the connector and the grounding sections on the boards. The system uses "beam-on-pad" spring contacts that provide high signal density--280 lines per 100 mm.

Testing LVDS interconnects

According to NESA's president, Ed Sayre, engineers designing interconnect systems face a basic problem: The designer--usually a logic or systems designer, sometimes with a mechanical background--usually understands electrical-measurement data in time-domain format. Frequency-domain descriptions, although accurate, do little to explain the operation of the unit under test to someone who has little or no experience with such concepts as S parameters. Therefore, NESA does all its characterization studies in the time domain.

Testing time-domain performance in high-speed LVDS systems is not cheap. NESA used an HP 54120B DSO mainframe; a dc to 34-GHz, four-channel HP 54123A test set with a built-in time-domain reflectometer (TDR); an HP 8133A-02 differential pulse generator; a Tektronix CSA803 communications signal-analyzer mainframe; and a 20-GHz, two-channel SD-24 TDR/sampling head.

Examine TDR plots of the impe-dance at various points in the interconnect system as a function of rise time (Figure 2). They show rise times of 40, 50, 100, and 250 psec. The magnitudes of the peaks and valleys in the four curves are inverse functions of the rise times. The peaks represent inductive parasitics; the valleys come from capacitive effects. The peaks are insignificant, measuring only about 5Ohm maximum. However, the dips can be serious: approximately 25Ohm worst-case. These impedance discontinuities are short-lived and of little consequence in 20- or 40-Mbps systems. However, in systems running in the hundreds of megabits per second, their duration can occupy a significant portion of the data-stream period.

Figure 3 shows the waveforms of signals passing through the SpeedPac connector at 622 Mbps (a) and 2.5 Gbps (b). For these speeds, the test used PECL signal levels: approximately ±800 mV. At the higher speed, less time is available for the signal to reach its final high and low values; the result is an effective margin loss off both the high and low ends at 2.5 GHz. However, the reference waveform shows a loss, too, suggesting that the test board is a major limiting factor in this test.

Figure 4 shows near-end (backward) differential crosstalk vs rise time for the SpeedPac connector. The test used two sets of connector pairs in the same row. The percentage values assume an ideal differential-input reference step from the dual-channel TDR/sampling head. The near-end crosstalk is approximately 0.33% for a 50-psec rise time; it decreases to approximately 0.21% for a 250-psec rise time.

Another example shows characterization techniques for QuickRing, a high-speed LVDS data-transfer architecture from Apple Computer (Cupertino, CA) (Reference 4). QuickRing controllers can move data streams at speeds as high as 350M samples per line. The paper in the reference describes the development and verification of backplane Spice models you can use to predict the performance of new designs.

NESA also explores the phenomenon of skin effect in differential-data cables. Skin effect, usually a frequency-domain consideration in linear RF applications, can significantly affect the bit-error rate in high-speed data communication. Both simulation and empirical data show rise-time deterioration arising from the skin effect. NESA used curves that show faithful waveform transmission at 100 Mbps, corrupted but usable waveforms at 400 Mbps, and severely distorted and practically unusable data at 1 Gbps (Reference 5).

Hewlett-Packard and Tektronix give considerable detail on TDR measurements in differential systems (References 7 and 8, respectively). The papers in the references discuss the tests for imbalanced differential lines. Imbalances can easily arise in pc-board differential-signal lines, from such factors as bends in the line, jumpers, conductor-width inequalities, and shunt stubs. Displaying the reflection characteristics of the individual TDR waveforms along with the difference TDR waveform reveals much more about a differential system than does the difference TDR waveform alone. For example, the individual TDR waveforms show you which conductor (or that both conductors) of a differential line causes an aberration to appear on a differential signal.

More connector systems

Several connector manufacturers are addressing the SCSI-interconnect market. Much of this market comprises hard-disk, floppy-disk, optical, and tape drives, as well as RAID systems. Ranoda Electronics, for example, offers its Ultra-SCSI connector with 0.050-in. pin centers, a data-pin count of 68, and 12 user pins. Contact ratings are 1A for data lines and 3A for power lines. The EBBI SCA-2 interconnect series from Molex are 40- and 80-circuit units for use with 2.5- to 3.5-in. SCSI and Fibre Channel disk drives. This connector, too, offers 0.050-in. centerline spacing. Thomas & Betts also offers an SCA-2 SCSI pc-mount receptacle, available with 40 or 80 contacts.

A pluggable device from Methode Electronics, using the VHDCI (very high-density interconnect) format, provides termination for LVDS lines. The shielded terminator provides both the common-mode voltage and the 100Ohm termination impedance for 27 differential lines. The VHDCI unit allows you to stack cable assemblies side by side on the bulkhead as specified for EISA cutouts in the small form factor.

A product from Packard-Hughes provides off-the-shelf board-to-board interconnect for high-speed systems, including LVDS. The EZ-PAC uses the company's Gold Dot technology to provide solderless connections. The system comprises a 3-in.-long flexible circuit that has 53 or 100 contacts at each end. It uses a screw-down or slide-lock mechanism for clamping. The screw-down version targets permanent installations; the slide-lock type is for applications requiring repeated mating and unmating.

You shouldn't take cabling for granted when you design an LVDS-interconnect system. The cable, usually using shielded twisted or parallel pairs, depending on the application, must provide controlled 90 to 100Ohm impe-dance to avoid introducing discontinuities and ensuing reflections. In addition, it's important to minimize skew. Skew can be either within-pair or pair-to-pair. Within-pair skew is especially insidious. If the negation and assertion lines in a pair switch at different times, the result is a large glitch in the differential signal.

The Spectra-Strip SkewClear cables from Amphenol boast low within-pair and pair-to-pair skew, typically 2 and 10 psec/ft, respectively. The company's literature explains that low skew offers the ability to connect longer cables at higher data rates and to impose broader skew tolerances in other system components, thus cutting costs. Low skew also produces lower EMI emissions. A range of low-skew differential cables is also available from NORDX/CDT. Other producers of differential cables for LVDS applications are Montrose/ CDT, Belden Wire & Cable, and Woven Electronics.

Perhaps the broadest line of LVDS-related products in the industry is available from Amp. The company manufactures several board-to-board interconnect systems, along with a variety of connectors and cables. Its SCSI cables run the gamut of SCSI standards: SCSI-2, SCSI-3, and Ultra SCSI. In addition, Amp offers comprehensive connector-modeling services for developing and characterizing interconnect configurations. The service includes both single-line and the considerably more complex multiline simulations.

References

1. Travis, Bill, "Fiber vs copper: Sometimes it's not an easy choice," EDN, Nov 21, 1996, pg 46.

2. Longeville, Jacques, "SpeedPac--a High-Speed High-Density Backplane Connector," Siemens Corp.

3. Baxter, Michael, and Edward Sayre, "Specification and Characterization of a Multi-Gigahertz Differential Backplane Connector," 1997 High-Performance Design Conference, North East Systems Associates.

4. Baxter, Michael, and Edward Sayre, "Closing the High-Speed Signal-Integrity Design Loop--the Design, Simulation, and Characterization of a QuickRing Backplane System," 1995 High-Performance Design Conference, North East Systems Associates.

5. Savarino, Thomas, Michael Baxter, and Edward Sayre, "Development of a New Transmission-Line Skin-Effect Model for Spice Evaluations--Simulations and Measurements," 1997 Digital Communications Design Conference, North East Systems Associates.

6. Pagnin, Peter, M Keller, and H Katzier, Siemens Corp, and Dirk Michel, Technical University of Ilmenau, Germany, "Field-Based Design of a New High-Pincount Board Connector for High-Data-Rate Transmission."

7. "TDR Techniques for Differential Systems," Application Note 62-2, October 1990, Hewlett-Packard Co.

8. "Characterization of a Differential Line Using the 11800-Series Oscilloscope Differential-TDR Capabilities," Technical Brief 47W-7519, Tektronix Corp.

| EDN Access | Feedback | Table of Contents |