July 3, 1997

SMART-CARD ICs provide
unimpeachable data security

David Marsh, Contributing Technical Editor

Today's contact-type smart-card ICs provide an extremely high level of security, and contactless types offer supreme user conven-ience. Newly introduced combined-contact/contactless types aim to bond both features.

Get ready to lighten your wallet. A new generation of smart cards is set to replace your current roll of phone cards, credit cards, bank cards, and the other pocket plastic you need just to get around in the world. Very soon, one card will handle your home finances, get you on a plane, let you into the office, and log you on to your corporate intranet. The keys to this scenario are mixed-signal semiconductor processes and shrinking device geometries that combine high-security digital hardware with radio-frequency transponder technology.

Where money is involved, security is paramount. French banks adopted smart cards more than 10 years ago because magnetic-stripe cards are relatively open to fraud. Reliability considerations limit data capacity in magnetic-stripe cards to about 140 bits, and it doesn't take a genius to tamper with that information. By comparison, even the simplest smart-card IC is extremely difficult to tamper with. So, now banks in France, Germany, Spain, Portugal, Finland, and South Africa rely on smart cards with IC intelligence from Motorola.

In the last 10 years, SGS-Thomson alone shipped over 1 billion smart-card ICs for applications including phone cards, subscriber cards, health records, social-security cards, and system-identification modules for cellular phones. Mass-transit systems from Finland to Korea rely on contactless smart cards from Philips.

As new applications unfold, semiconductor manufacturers are busy working on ways to make the new contactless smart cards as secure as contact-based cards. This move is difficult because contact-based smart cards are using longer encryption keys together with mutual authentication techniques that take network pressure off the service provider's back system. This design feature offers a look at today's representative smart-card ICs, concentrating on ICs that use "public-key" cryptography. The box, "Developments for the smart-card industry," gives you references for industry standards and developments such as the ISO 7816 series, the PC/SC specification, the EMV specification, and the Java Card Forum.

Smart-card categories and cost

Some IC vendors argue that a smart card isn't smart unless it has an onboard processor. According to the world's largest smart-card maker, Gemplus, "A smart card is a credit-card-sized plastic card with a special type of IC embedded in it. The IC holds information in electronic form and controls who uses this information--and how" (Reference 1). Adopting Gemplus' definition, you can divide smart-card ICs into two main categories: intelligent-memory ICs and µP-based ICs. Intelligent-memory ICs are functionally either counters or data carriers, and µPs can host multiple applications. Counters suit debit cards such as phone cards and electronic tickets; data carriers suit secure storage such as bank cards, subscriber cards, health records, and mobile phones.

Each smart-card-IC category further subdivides into electrically contactable and contactless (RF identification, or RFID) ICs. Smart cards with contacts are today's standard for static and high-security applications--for example, system-identification modules in cellular phones and automatic teller machines in banks. Contactless smart cards suit ticketing in mass-transit systems, where there isn't time for users to insert a card into a reader. The trend in smart-card-IC design is toward cryptographic coprocessors for security and combined-contact/contactless designs for ultimate application flexibility. See Table 1 and Table 2 for examples of all types of smart-card ICs.

You can choose among smart-card- IC categories according to your application needs and cost. For example, a simple intelligent-memory counter IC for a phone card can cost as little as $1. When you make enough calls, its value is exhausted and you throw it away. Global System for Mobile communications (GSM) cellular phones use data-carrier smart-card ICs mounted in standard-format smart cards or in miniature system-identification modules (SIMs). The smart-card IC secures the user's personal identification number (PIN), system access data, and end-user data-like phone-book entries. Mounted in a standard-format smart card, a data-carrier IC such as Xicor's X76F640 costs less than $5 (10,000 qty).

A basic µP-based smart-card IC costs around $6; more powerful multi-application devices cost $10 or more. Hybrid cards with contacts and RF circuitry are very new, and you can expect to pay more for their potential. Smart-card-IC pricing is especially sensitive because purchasers typically buy in very high volumes. To get realistic figures, you'll need to talk directly to competing vendors. You'll find that companies such as Texas Instruments typically deal directly with the big smart-card makers, and Xicor targets low-volume users who need quantities of up to 10,000 pieces.

Simple intelligent memory?

Designed for telecomm debit-card use, Siemens' SLE 5536 is an intelligent-counter/memory IC that illustrates most secure smart-card-IC concepts. Philips' PCF223x and SGS-Thomson's ST133x families are broadly similar and use cryptographic card-authentication techniques. The SLE 5536 IC comprises 221 bits of EEPROM, a 16-bit mask-programmed ROM, a control/security logic block, and an authentication processor. The user EEPROM comprises a 64-bit identification data area and a 40-bit counter chain. The 133-bit feature EEPROM divides into 129 bits for data and authentication keys and 4 bits for counter backup flags. The mask-programmed ROM contains a manufacturer's code. When the IC leaves the fabrication plant, all memory is in issuer mode, protected by a secret "transport" code. When the smart-card manufacturer matches the transport code, the IC's memory is ready for programming.

The SLE 5536 IC's preloaded five-stage counter operates as a five-digit octal counter. The most significant counter stage represents 4096 units/bit, with subsequent stages representing 512, 64, 8, and 1 unit/bit. In use, the debit operation programs bits in the respective counter stages. When there aren't sufficient bits left in a counter stage, an erase-with-carry operation writes 1 bit into the next stage and erases all bits of the lower stage. Dedicated-count stage bits limit the maximum count to 21,064 count units. Each of the four higher counter stages has 1 backup bit that provides a simple "antitearing" mechanism.

Antitearing mechanisms prevent count data corruption if the read-erase operation doesn't complete, which is especially important if cards are used in low-cost open card readers. For example, in the SLE 5536 IC design, backup bits are set with the carry bit in the relevant counter stage and reset simultaneously with the less significant counterstage erase operation. If the card reader finds a set backup bit the next time the user inserts the card, the card reader can correctly complete the unfinished transaction.

Secret and public keys

According to the EMV '96 Integrated Circuit Card Specification for Payment Systems, a symmetric cryptographic algorithm "uses the same secret key for both the originator's and recipient's (data) transformation. Without knowledge of the secret key, it is computationally infeasible to compute either the originator's or the recipient's transformation" (Reference 2). This move requires that the unique secret key embedded in the smart-card IC match a partner key on the service provider's system. The principal advantage of symmetrical data-encryption algorithms, such as the DES (Data Encryption Standard) algorithm, is computational efficiency.

The principal limitations are ultimate security and application flexibility, because service providers must manage and distribute potentially vast numbers of secret keys (each partner in a secret-key system must know the identity of all valid participants). Philips notes that with modern network structures, a 2000-participant system could demand almost 2 million secret keys.

Cryptographic processors accelerate math so that it is possible to use "public keys" together with "asymmetric" data-encryption algorithms, such as the RSA (Rivest, Shamir & Adleman) algorithm. With the public-key approach, each card IC has a unique secret identity, but the key that matches that identity is truly public--you could print it in a newspaper. Managing public keys between network and service providers isn't an issue. The cryptographic processor encrypts and decrypts messages using the private key and the public key, which together form a "digital signature." The private key does not traverse the network, which increases security and takes pressure off the network and the service provider's back system.

Our example SLE 5536 IC uses a dedicated "authentication" (cryptographic) processor to secure its data transactions. The smart-card manufacturer first programs the SLE 5536 IC with card-identification data, initial counter value, and either one or two authentication keys. Two authentication keys will support two applications (in this case, two phone companies). When the smart-card manufacturer programs a "personalisation" bit in counter stage five, the IC switches from issuer mode to user mode. The identification data area is now write-protected, the counter can only decrement, and the authentication keys become secret--that is, truly private to the IC.

The IC's authentication processor and the card-reader terminal engage in a mutual authentication procedure (Figure 1). The terminal first reads the card's identification data and counter value. The terminal then issues a "challenge" data stream--typically a 16-bit random number. The IC's authentication processor combines the terminal's challenge data and the card's identification data, counter value data, and secret key. The terminal reads the result and compares it with a result that the terminal computes locally using a general key, which is securely stored in the terminal. The relationship between the secret key and the general key is such that the terminal can determine that the card is valid without ever knowing the card's secret key. When the transaction completes, the terminal needs only to upload relevant billing data to the service provider's back system.

The SLE 5536 IC can optionally use extended authentication, or "cipher block chaining," to ensure that every subsequent authentication procedure is valid, by updating a memory block. Because the IC's counter value forms part of the authentication data stream, extended authentication independently verifies the counter's decreasing value. Most smart-card ICs also have physical security mechanisms that protect against signal analysis. In the SLE 5536 design, minimum and maximum clock frequencies guard against static probing and signal scanning. Voltage monitors inhibit out-of-specification operation for both supply and signal levels. Even the IC layout has hidden signal lines and contacts that prevent physical or optical probing. A metallisation layer screens the IC's entire surface.

Micros for the e-purse

By partitioning memory, providing multiple passwords, and supporting se-cure communications, one µP-based smart card can replace the roll of magnetic-stripe cards that most of us need for today's cashless transactions. Combined with cryptographic co-processors, µP-based smart-card ICs will form the basis for the true "electronic purse," or e-purse. Very soon, µP power, public-key technology, and low-cost PC-card readers will facilitate secure personal financial transactions over the Internet.

Cryptographic-coprocessor capabilities vary in the number of key bits they can process, with more key bits providing better security. New co-processor designs handle 1024- and 2048-bit keys. The limiting factors to key length are acceptable response time, available RAM to hold intermediate results, and IC die size. Acceptable response times lie under 2 sec, compared with the 40 to 80 sec that early smart-card ICs take to compute a 512-bit key using the RSA algorithm. For example, Motorola's forthcoming MSC0510 IC resolves a 512-bit key in less than 300 msec. ISO-7816 limits smart-card-IC die size to 25 mm² to avoid the die's cracking when cards flex in everyday use. Trade-offs between silicon area and cryptographic-coprocessor performance limit the coprocessor silicon area to approximately 10% of total die size.

Hitachi, Motorola, Philips, Siemens, and SGS-Thomson predominantly use 8-bit µP cores coupled with dedicated hardware cryptographic coprocessors. Announced in May, the "Smart-xa" family from Philips uses a 16-bit processor core that is upwardly compatible with the 8-bit 80C51. The 16-bit architecture suits the Java programming language, which requires substantial real code to run its virtual code. Java is being strongly promoted as the smart-card application-de-velopment language of choice (again, see box, "Developments for the smart-card industry"). The first Smart-xa family member will be the 83W8616 IC, available later this year.

In the Smart-xa IC family, the µP core provides two virtual machines, separated by a "firewall" (Figure 2). The protected machine manages access privileges to memory space, so that one application can't interfere with another. The idea is to allow the user machine to run multiple applications in a protected environment--analogous to secure operating systems such as Windows NT. Early in 1998, the 83W8516 IC will couple the 16-bit processor core with Philips' third-generation "Fame-x" cryptographic coprocessor.

"Fame-x" stands for Fast Accelerator for Modular Exponentiation-extended--a reference to the mathematical technique that underlies public-key algorithmic computation. The Fame-x coprocessor computes a 2048-bit key in 1.82 sec with a 5-MHz clock frequency, or a 1024-bit key in 805 msec.

In conjunction with smart-card-maker Gemplus, Texas Instruments is developing a 32-bit RISC processor IC, based on the ARM7 core, that will use software for its data transformations. The Texas/Gemplus project is Esprit project 8670 ("Cascade"), and volume IC production will start in early 1998.

Contactless smart cards suit access-control applications, typically for mass-transit systems. Because access-control systems must process large numbers of users very quickly, there isn't time to insert a card in a reader. Instead, an RF transponder in the card-reader terminal reads the codes embedded in your card. The card's IC is self-powering, working at approximately 2.7V dc. A simple antenna in the smart card connects to a voltage-regulation circuit, powering the modulator/demodulator that provides duplex communication between card and reader. The antenna can be printed or etched, or it can be a wire-coil embedded in the card body.

The biggest contactless smart-card access system today is "Mifare," which stands for "Mikron's fare-collection system," developed by Philips-subsidiary Mikron. More than 30 installations worldwide use Mifare. The largest rollout is in Seoul's public-transportation system, where Mifare processes some 2 million transactions daily, with a 99.99% success rate. Cards are rechargeable at any of the 1700 card-reloading stations that have replaced former token-selling booths. According to systems-integrator Intec, some 80% of cards issued are reloaded.

Mikron's MF1 S50 contactless smart-card IC operates at 13.56 MHz (an ISO-14443 standard frequency). Effective baud rate is 106 kbaud, and operating distance is 100 mm with a credit-card-size antenna. The MF1 S50 IC has an 8-kbit EEPROM that can be organised into 16 sectors with two keys per sector, which makes the IC useful for cards that support multiple applications. Data-transmission integrity relies on a 16-bit cyclic redundancy check (CRC), together with parity check, bit counting, and channel monitoring mechanisms. Security mechanisms include mutual three-pass authentication, data encryption, and a unique 32-bit serial number. The control and arithmetic unit permits increment/decrement for recharging the card. Anticollision logic resolves multiple card identities, even when cards are stacked (the worst-case scenario). A typical ticketing transaction takes less than 100 msec.

This year, Philips, Siemens, and SGS-Thomson will release smart-card ICs that combine ISO-7816-compatible contacts with ISO-14443-compatible contactless technology. Motorola is also working on contactless technology. This new class of smart-card ICs holds the most promise for future smart-card application development and will be the key to the universal smart card. First-generation products build on existing µP-based contact ICs, so far without including cryptographic coprocessors. Philips' MF1 P60 IC combines an 80C51 µP core with the company's Mifare RF interface. Siemens' SLE44R42S IC is another 80C51 hybrid that combines Siemens' smart-card design with RF technology licensed from Philips Mikron.

SGS-Thomson is working with smart-card-inventors Innovatron to produce a range of contact/contactless smart-card ICs. The company's first example is the ST16RF42 IC. Built using a 0.9-µm CMOS process, the ST16RF42 IC has an 8-bit ST6 µP core, a 2-kbyte the EEPROM, 16 kbytes of user ROM, 1.5 kbytes of system ROM, and 384 bytes of RAM. To support two applications, you can configure both the user ROM and EEPROM into two sectors. A memory access-control matrix governs access between the sectors.

In contact mode, the ST16RF42 IC supports clock frequencies to 5 MHz and supply voltages from 2.7 to 5.5V dc. In contactless mode, the 13.56-MHz RF interface provides 106-kbaud communications at up to 100 mm from the card reader. The communication protocols are NRZ (nonreturn to zero) with 10% amplitude modulation from card reader to IC and Manchester coding with 30% load modulation from IC to card reader. Security features include memory partitioning and access control, test programs in ROM, and a double-metal layer that covers the IC interconnects to prevent probing.

Want to know more?

See the box, "For more information...," in which you'll find contact details and Web-site addresses for smart-card-IC vendors. To obtain more information from the smart-card makers, check out Gemplus' excellent Web site at www.gemplus.fr, or its mirror US site at www.gemplus.com. Gemplus offers background information on smart-card technology, including articles that discuss data-encryption techniques. Gemplus also includes many links to other smart-card sites, including other vendors, associations, and forums. Schlumberger also has an informative Web site, located at www.slb.com/et. In addition, you can also find more interesting material at Innovatron's Web site at www.cardshow.com.

References

1. "Welcome to Smart Cards," Gemplus Web site, www.gemplus.fr.

2. "EMV'96 Integrated Circuit Card Specification for Payment Systems, Version 3.0," Europay International SA, MasterCard International Inc, and Visa International Service Association, www.visa.com.

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