September 12, 1997

Decoupling capacitors: use them or fail

Theory is wonderful, but practicalities have their place.

I'll get to the capacitors in a second, but first, why should you listen to me? What qualifies me for this plush job in which I write, do lunch, and get paid to boot? It's not my formal training; it's because I had my share of screw-ups while designing a lot of analog hardware. My inordinately stubborn streak, coupled with a sense of self-preservation, forced me into the lab. There, I found and corrected mistakes and learned a lot that was not in the books. In my future columns, I will share some analog-design tricks with you and will examine and emphasize the basics of analog design.

About 30 years ago, a veteran engineer told me to clean up a mixed-signal design; he told me the way to accomplish this task was to sprinkle some decoupling capacitors on the board. I'm not sure who his last flunky was, but I did it my way. Using the latest computer techniques and a circuit-analysis program, I modeled the board, and the results were useless. My stubbornness surfacing again, I painstakingly modeled the stray capacitance and inductance, accounted for the TTL transient currents, and reran the analysis. The analysis started to approximate the lab results, so I just dug deeper. After three weeks, I tamed that board and proudly showed the board and analysis to the veteran engineer. What a letdown it was when he pointed out that I had come pretty close to achieving a good but already-existing rule of thumb for decoupling capacitors. In other words, I reinvented the wheel.

This rule is to use one 0.1-µF ceramic per digital chip, two 0.1-µF ceramics per analog chip (one on each supply), and one 1-µF tantalum per every eight ICs or per IC row. I quickly pointed out that applying this rule to the board that I redesigned required seven extra capacitors. His response was, "Your design is good for only one board, but your design time costs more than a truckload of capacitors." How do you argue with this logic? The lesson I learned is that theory is wonderful, but practicalities have their place.

TTL, including CMOS, generates current spikes in power lines because of a transient state in which both output transistors are simultaneously on. The resistance between the 5V-supply terminals limits the supply current, and, as speed increases, this resistance gets smaller, and the transient currents increase to 100 mA. These transient currents contain high frequencies because they are impulses. The bottom line is that when current spikes propagate down a power-distribution system, they develop 10- to 100-mV voltage spikes. When a bus changes state, the effects are additive, causing 300- to 500-mV, 1- to 2-msec transients to develop on the power lines. Decoupling capacitors supply the transient current at the IC leads, thus keeping the transients out of the supply lines. The 0.1-µF capacitor handles the high-frequency transients, so it must have an excellent dielectric, which is characterized by a 500-MHz self-resonant frequency and low ESR. A 1-µF capacitor connects in parallel with the 0.1-µF capacitor to help with the bus transients.

Because this capacitor must have a good dielectric, the question is: Must the capacitor be tantalum, or can it be aluminum-electrolytic? The electrolytics work well for me, but I use a high-grade capacitor with guaranteed specifications. If the purchasing department doesn't get a deal on some junk capacitors that don't meet specifications and if the design is conservative, component degradation (oh yes, it really happens) occurs with time but does not degrade system performance. Get the decoupling capacitor as close to the IC power leads as possible, because lead inductance can resonate with the capacitors. Surface-mount capacitors are excellent because you can place them almost on top of the power leads.

Following the rule of thumb for decoupling capacitors and using good capacitors with guaranteed specifications can prevent many future field problems. My next column will demystify those nasty transmission-line reflections that hang around TTL circuits.

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