September 12, 1997

Push numerically controlled
oscillators beyond their limits

Tom Napier, Consultant

NCOs can generate signals of less than 1 Hz to many tens of megahertz that still have millihertz resolution. By understanding their operating subtleties, you can use NCOs in more applications than you may have thought possible.

The output purity, frequency resolution, and modulation ease of a numerically controlled oscillator (NCO) often outweigh the fact that it costs more than a PLL. The core of an NCO is typically a phase accumulator, which comprises a phase-increment register and a phase-accumulator register (adder), both typically 24 to 48 bits wide (Figure 1). The phase-increment register stores a number, which the user's system supplies. Each time the phase-accumulator register is clocked, the accumulator adds the number in the phase-increment register to the number in the accumulator register.

If the phase increment is small relative to the accumulator width, the contents of the accumulator register steadily increase and wrap around when the accumulator overflows. The frequency of these overflows is equal to the accumulator's clock frequency multiplied by the phase increment and divided by the binary size of the accumulator. Because the size of the accumulator and the clock frequency are fixed, the frequency with which the accumulator overflows is a linear function of the phase-increment register's contents.

For example, suppose that an accumulator has 24 bits, the clock frequency is 1 MHz, and an increment register contains a count of 1000. The overflow frequency is 1000×1,000,000/ 16,777,216, or 59.605 Hz.

If it connects to a DAC, the phase-accumulator output generates a sawtooth waveform at the overflow frequency. Because you can't buy a 24-bit DAC, only the top 8 to 12 bits of the accumulator connect to the DAC. If the DAC uses 12 bits, the sawtooth waveform has 4096 small steps in it, and an output step would occur about every four clock cycles.

As the output frequency becomes a higher fraction of the clock frequency, the sawtooth waveform jumps by several DAC resolution steps every clock cycle, rather than making one DAC resolution step every few clock cycles. If the increment number changes to 1,000,000, for example, making the accumulator overflow would take only 16.777 clocks. The output frequency would be 59.605 kHz. Each sawtooth would comprise 16 or 17 large steps.

A sawtooth output is not useful, so most NCOs incorporate a circuit that converts the sawtooth from the accumulator into a sine wave. Thus, the NCO's output consists of a series of numbers--occurring at the clock frequency--that correspond to samples of a sine wave. When you feed these numbers to the DAC, it outputs a stepwise approximation to a sine wave at the desired frequency.

This waveform has a spectrum with a strong line at the desired frequency plus lines that are separated from multiples of the clock frequency by plus or minus the desired frequency. If you use an NCO with a clock frequency of 50 MHz to generate an output of 15 MHz, the output also contains a strong line at 35 MHz and steadily weaker lines at 65, 85, and 115 MHz and so on. The standard practice is to remove the unwanted frequencies with a lowpass filter that has a sharp cutoff below half the clock frequency (Figure 2).

Even though the DAC-output waveform looks terrible when the output frequency is a significant fraction of the clock frequency, a good lowpass filter removes most of the energy at the unwanted frequencies and leaves a fairly pure sine wave. The bad news is that, as the wanted frequency rises, the unwanted frequency that occurs at clock frequency minus output frequency gets lower. The two meet when the output frequency equals half the clock frequency, which means that you need a sharp-cutoff filter to achieve an output of even 40% of the clock frequency.

As the desired frequency falls, the undesired frequencies remain high, unlike the case of a wide-range VCO. The VCO's second harmonic, which is commonly only about 8 dB below the fundamental, moves into the desired frequency range as the output frequency lowers.

The unfiltered DAC output has an amplitude that falls off as the output frequency rises. Even with a perfectly flat filter, the output is 2.4 dB down at 40% of the clock frequency. Thus, it would appear that the ideal DAC filter would rise and then sharply fall. That would be the case if the output phase and frequency rarely changed, but this DAC filter would be the wrong one to use if the NCO is modulated. If your application requires only low output frequencies, you can use a less steep, lower frequency filter. You can also lower the NCO clock frequency, which may let you use a cheaper NCO and a much cheaper DAC.

Typical NCOs run at clock frequencies as high as 70 MHz, although some that use GaAs logic and lots of power run as high as 1 GHz. These frequencies limit most NCOs to applications from dc to about 30 MHz. However, within this range, the NCOs' frequency resolution can be one part in 10¹², and their frequency accuracy is as good as that of the crystal driving the clock.

Frequency modulation is the first application

The key virtue of the NCO is its tunability; after all, if you want an accurate, fixed frequency, you use a crystal oscillator. You can change the NCO's output frequency by simply loading a new number into the increment register. In principle, this approach causes an instantaneous change in the output frequency. The new frequency is phase-coherent with the old one; that is, no jumps occur in the output waveform, and only the output slope changes.

However, this approach has several practical limits. One is that the increment register has many bits, and to connect them all to the outside world would require too many pins for the NCO package. Many NCOs are loaded by the microprocessor via an 8-bit bus. The NCO sets up an internal holding register byte-by-byte, and then the holding register's contents transfer to the increment register all at once. Although this method is fine for setting up an arbitrary frequency, it doesn't lend itself to frequency modulation except at very low rates. At least one NCO, the Harris Semiconductor (Melbourne, FL) HSP45102, contains two internal 32-bit registers that the microprocessor serially loads. Either one can switch to the increment register on command, allowing this NCO to generate a frequency-shift-keyed signal.

If an NCO has a direct FM input, it almost certainly has a limit on the point in the clock cycle at which the input can change. You may need a wide, external, synchronizing register when frequency changes occur asynchronously relative to the NCO clock.

However, NCOs have another limit to FM. The accumulator has to make a 24-, 32-, or 48-bit addition every clock cycle, which can be as short as 14 nsec. Obviously, the accumulator cannot propagate carries down the register in so short a time. So, NCO manufacturers divide the accumulator into many 4-bit sections, because it is not difficult to perform a 4-bit addition with carry propagation and generation in that time. Each 4-bit section drives the next, but one clock cycle later. Delay registers between the increment register and the accumulator allow any increment changes to appear in the right time sequence at the accumulator. A further set of delay registers connects between the output of the sine converter and the input to the DAC, so the staggered addition is invisible to the user.

The result of these delays is a latency of around 20 clock cycles between your input of a change to the increment register and the appearance of the new frequency at the NCO output. This latency not only delays the frequency change, but also makes it nearly impossible to apply a new change until the previous one has worked its way through the pipeline.

This limitation slows the rate of FM and can be a major problem when the NCO is inside a PLL. Because you can accurately tune an NCO to any frequency within its range, it is the ideal device for acquiring lock with one of many radio signals whose mean frequency you know. However, if Doppler shift or jitter exists in the incoming signal, the local-oscillator frequency that the NCO generates must change with these variations to retain phase and frequency lock.

Some NCOs have two input registers whose values the accumulator sums to set the output frequency. You can set one of these input registers to the expected frequency, and you can use the other to input corrections to match the input signal's carrier deviation. To acquire the signal, set the deviation register to zero. After you acquire the signal, a numerical PLL drives this register to track the input.

Unfortunately, the frequency response of the components in the loop needs to be at least seven times the desired loop bandwidth to achieve a stable loop. Also, any delays within the loop need to be less than the equivalent of a few cycles of the input signal. Therefore, the NCO can easily generate the carrier frequency, but its latency limits how wide a loop bandwidth you can achieve. The solution is either to select an NCO with a low latency (using a 24-bit NCO rather than a 32- or 48-bit NCO helps) or to use the highest practical NCO clock frequency.

One source of delay that people often overlook is the DAC filter. It has a bandwidth that is approximately half the clock frequency, and, if the filter has a sharp cutoff, it may have a delay that is several times the reciprocal of its bandwidth. Thus, the filter can also produce a latency of many clock cycles, but you can reduce it by careful filter selection.

Phase modulation is the next effort

The unfiltered, direct output of an NCO is a linear ramp. Changing its most significant bit from a one to a zero or from a zero to a one causes an instantaneous phase shift of 180° in the sine output. By manipulating the top 2 bits of the accumulator, you can generate four phases separated by 90°. Thus, the NCO is well-suited to generating binary phase-shift-keyed (BPSK) and quadrature phase-shift-keyed (QPSK) signals. By manipulating the top 3 bits, the NCO generates eight phases and so on. By adding an arbitrary number to the ramp output, which some NCOs allow, you can also generate linear phase modulation.

However, if you make a 180° phase shift at an arbitrary time, you may generate a full-scale step in the output waveform. If the DAC filter has a sharp cutoff, this step results in a burst of ringing in the phase-modulated signal. For example, in one case, a design team followed the NCO manufacturer's recommendation and installed a 10.7-MHz lowpass filter after the DAC. This filter is an excellent choice for a fixed-frequency NCO because it cuts off sharply at about 14 MHz. Unfortunately, the team was trying to generate a BPSK signal and couldn't understand why the output waveform was so distorted.

One option is to use a filter, such as a Bessel filter, with a flat group delay. Unfortunately, the sharp cutoff in the frequency domain means ringing in the time domain, and the flat response in the time domain means a rounded response in the frequency domain. Bessel filters have a short, constant delay but a rounded frequency response, risking a variable output amplitude within the passband and too much contamination from the unwanted frequencies.

An alternative is to add equalizing sections to a Butterworth filter to flatten the group delay. This method adds to the signal's overall delay through the filter, which may be undesirable. A less complex option, which often proves adequate, is to add a notch section to a Bessel filter. A notch frequency set below the clock frequency can provide a useful degree of attenuation without significantly worsening the filter's time-domain response. All of these approaches result in a smooth transition between the two points on the sine wave for a full-scale phase change.

When you select a filter configuration, remember that fast DACs generally have current output but can also have a significant output capacitance. However, the filter can drive a buffer amplifier rather than a terminating resistor, and this amplifier may have a voltage or current input. It is worth considering nonclassical filter designs, such as four- or five-pole Bessel filters (Figures 3a and b).

The values in Figure 3 are for a Bessel filter with a ­3-dB point at 10 MHz. You can scale these values to suit different cutoff frequencies and load resistors. The values are not critical, so you can probably use standard components with no more than a slight change in the load-resistor value, for example. Capacitor C₁ should be smaller than the computed value to compensate for the output capacitance of the DAC, which may be 20 to 30 pF. If the output impedance of the DAC is less than about 1000 ohms, it adversely affects the filter performance. Be sure to use a unity-gain-stable amplifier at the output of the five-pole filter; you cannot apply capacitive feedback to a current-feedback amplifier.

High-speed DACs' outputs are often unipolar, and these outputs have a limited compliance range. A typical DAC may have an output of ­20 to 0 mA and a compliance of ­3 to +2V. This drive capability means that you can directly apply a 10-mA offset current to its output, but the current cannot drive a resistance higher than 200 ohms without the DAC's output limiting. For the DAC output to achieve exact symmetry about zero requires either a trimmable current source driven from the same reference voltage as the DAC or a dc-feedback system to force the mean output to zero. The DAC output has an inherent roll-off, and the filter worsens this roll-off. If the output amplitude must remain constant as the frequency changes, you may need an AGC, for example, to drive the reference input to the DAC.

AM is the final choice

The output of the NCO is a number; you can simply multiply this number by another number before driving the DAC. This multiplication allows you to amplitude-modulate the DAC output by as much as 100% and is a convenient method of generating quadrature-amplitude modulation (QAM). You also can achieve modulation by powers of 2 by fitting a variable shifter between the NCO and the DAC. Both methods reduce the purity of the waveform at high-modulation depths because you use fewer DAC bits to generate the waveform. You can achieve cleaner but less accurate AM with many DACs by modulating their reference-voltage inputs. The output-filter guidelines for frequency and phase modulation apply to AM.

Unless a DAC has a true bipolar output, AM is one-sided, meaning that the dc-output level is also modulated. This consideration applies whether you modulate numerically before the DAC or modulate by varying the DAC's reference voltage.

Maybe you need a square wave

NCOs generate sine-wave outputs, but a square-wave output is more useful when you use the NCO as a data-clock generator. The crude way to get the square wave is to use the most significant bit of the sine wave as the output. Because this bit changes synchronously with the NCO clock, it has an inherent one-clock-period jitter whenever the output frequency is not an exact binary fraction of the clock frequency. This jitter may not matter in your application; for example, a 50-MHz NCO generates 20 nsec of jitter, which is negligible if the output is a 1-kHz clock. However, the classical solution is to use the full NCO/DAC/filter circuit to generate a sine wave and to then feed this sine wave to a comparator. The comparator generates an output transition for each zero crossing in the sine wave. The filter, in effect, interpolates between the NCO output samples.

Note that the comparator needs hysteresis unless the output frequency is high relative to the clock frequency. The filter output is theoretically a pure sine wave, even down to low frequencies. However, the NCO clock frequency is at TTL level, and in any practical circuit, the output contains a few millivolts of clock-frequency ripple. At low frequencies, when the output rate of change is small, the comparator input waveform crosses zero many times at the clock frequency. Even if the comparator can cope with slowly changing inputs, without hysteresis its output cycles many times on each transition.

An alternative way to generate a square wave is available. Some of the first available NCOs had a raw ramp output and required you to provide an external PROM containing a look-up table to convert this ramp to a sine wave. Because the timing constraints between the NCO and the PROM and between the PROM and the DAC were almost impossible to meet, a simpler way of making a square wave had to be found. Interestingly, you could set this NCO, which is no longer available, to generate a ramp-up, ramp-down waveform. Putting this waveform into a DAC without the look-up table generated a triangular wave at low output frequencies. The regular lowpass filter rounded off the peaks but left well-defined zero crossings. Unfortunately, if the output frequency was greater than about 10% of the clock rate, the waveform became too wobbly to generate a jitter-free square wave.

However, provided that the output frequency was less than 25% of the clock rate, at least one sample would exist on each side of each zero crossing. Linear interpolation between these samples would locate the exact zero-crossing point. One filter does such interpolation with a step response that is a fixed-length linear ramp (Reference 1). It is based on the Paynter filter, which, like the Bessel filter, has a flat group delay.

With this filter on the output of the DAC, the waveform becomes a "connect-the-dots" outline of the samples. The peaks of the waveform have a variety of slopes, but the zero crossings all pass through the same point (Figure 4). At 18% of the clock frequency, an interpolating filter gives jitter-free zero crossings, even though the waveform peaks are distorted. This fact is illustrated by the NCO-output samples, the DAC output, the output of the filter, and the comparator output (Figures 4a through d, respectively).

The filter need not be very sophisticated, because it is shaping the waveform, not eliminating unwanted frequencies. The worst an inadequate filter can do is to make the square wave more jittery. Figure 5 shows a simple circuit with a current-input interpolating filter and an output comparator. The values are for a 50-MHz clock frequency with a 100 ohm resistor, R. You can scale the component values to match your clock frequency; be sure to use adequate power-supply bypass capacitors on the comparator.

NCO makers tout useful outputs as high as 40% of the clock frequency. Linear interpolation appears to be limited to just 25% of the clock frequency. However, output jitter degrades gracefully as you increase the frequency (Figure 6). Whenever one point is past the peak, the previous point is near zero, so the timing error near the zero crossing remains small. You can achieve a useful square wave that is typically at least 35% or higher of the clock frequency. An advantage of linear interpolation is that the filter delay is half the clock period, rather than three or four clock periods. Eliminating the sine conversion also greatly reduces the NCO's latency.

You can use linear interpolation with a sine-output NCO, although doing so wastes some of its advantages. Some NCOs have a test mode that bypasses the sine generator. You can modify this output to make an up/down ramp by adding exclusive-OR gates. However, it is easier to make a triangle-output NCO than to make a sine-output NCO.

Do-it-yourself NCOs finish the task

The sine conversion is the tricky part of an NCO design, whereas the rest is just binary addition. For this reason, it is not too hard to make your own NCO if you want a square-wave output. One simple method is to buy a multiplier/accumulator chip. These chips usually consist of a 16×16-bit multiplier and a 35-bit accumulator. You can use one 16-bit input as the frequency-setting register and the other to apply a scale factor. The top 12 bits of the accumulator supply the needed output-frequency samples. The output is a ramp that you must turn into an up/down triangle by using an array of exclusive-OR gates.

The frequency resolution of this design is limited to 16 bits, but by setting just 1 bit of the other input, you can set the binary exponent of an effective, wide-ranging, floating-point frequency. An advantage of the accumulator chip is that it usually has no internal pipeline delay. If you are adept at programming field-programmable logic arrays, you can easily build your own NCO running at clock rates as high as the 70 MHz that regular NCOs achieve. You can incorporate such details as the output exclusive-ORs on chip, in addition to much of the support circuitry, such as a serially loaded center-frequency register.

References

1. Hansen, Peter D, "New approaches to the design of active filters," The Lightning Empiricist (the newsletter of George A Philbrick Researches Inc), January to July 1965.

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