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October 9, 1997 CMOS
image sensors: STEPHEN KEMPAINEN, TECHNICAL EDITOR Developments in CMOS image-sensor technology bring new light to applications for cameras and machine vision. Because of integrated signal processing and active pixels, products such as low-power cameras on a chip are possible. Imagine using a videocamera the size of your TV remote control to record high-resolution color images for hours. This videocamera and other products are possible because of image sensors with integrated digital-image processing that standard CMOS foundries produce. Based on CMOS, the new breed of image sensor makes these vision-information products not only compact, but also low cost. However, it is premature to claim the dominance of pure CMOS image sensors over mature CCDs. CMOS image quality has yet to match CCD quality, and sensors that use some features of CCD pixels in a CMOS technology are seeing image-quality results. CMOS image sensors appeared in 1967. However, CCDs have prevailed since their invention in 1970 (Reference 1). Both solid-state imaging devices depend on the photovoltaic response that results when silicon is exposed to light. Photons in the visible and near-IR regions of the spectrum have sufficient energy to break covalent bonds in silicon. The number of electrons released is proportional to the light intensity. Even though both technologies use the same physical properties, all-analog CCDs dominate vision applications because of their superior dynamic range, low fixed-pattern noise (FPN), and high sensitivity to light. In the last five years, however, image-sensor research has advanced. Pure CMOS image sensors have ridden on the coattails of advances in CMOS technology for microprocessors and ASICs. Submicron lithography, coupled with advanced signal-processing algorithms, sets the stage for sensor array, array control, and image processing on one chip. Using CMOS to produce image sensors provides several benefits. Shrinking lithography should decrease image-array cost due to smaller pixels. But pixels cannot shrink too much, or they have an insufficient light-sensitive area. Shrinking lithography also reduces metal-line widths that connect transistors and buses in the array. This reduction of metal-line widths exposes more silicon to light, thereby increasing light sensitivity. CMOS sensors also provide greater power savings, because they require fewer power-supply voltages than do CCD imagers. In addition, by adding active circuits to each pixel, the CMOS-sensor chips even provide high-resolution, low-noise images that compare with CCD quality. Finally, research continues on adjusting color separation for CMOS-sensor peculiarities to produce quality color images. Research also continues in CCDs and hybrids of CCD and CMOS technology. Adding transistors to create active CCD pixels promises CCD sensitivity with CMOS power and cost savings. Image-sensor manufacturers produce these charge-modulated devices (CMDs) by adding only a few steps to a standard CMOS production line. CMOS pixel arrays
Support circuits for the photodiode array and image-processing blocks constitute the rest of the chip. Vertical-shift registers control the reset, integrate, and readout cycle for each line of the array. The horizontal- shift register controls the column readout. A two-way serial interface and internal register provide control, monitoring, and several operating modes for the camera functions.
Passive photodiode pixels were the first image-sensor devices used in the 1960s (Reference 2). The pixel comprises the photodiode in which the photon energy converts to free electrons and an access transistor to the column bus. After photocharge integration, the array controller turns on the access transistor. The charge transfers to the capacitance of the column bus, where the charge-integrating amplifier at the end of the bus senses the resulting voltage. The column-bus voltage resets the photodiode, and the controller then turns off the access transistor. The pixel is then ready for another integration period. The passive photodiode pixel achieves high "quantum efficiency": the ratio of collected electrons to incident photons. The quantum efficiency is high because the fill factor is large. The fill factor is large because the pixel contains only one access transistor. The quantum efficiency is also high because there is usually no need for a light-restricting polysilicon cover layer, which reduces quantum efficiency in this type of pixel. Shortcomings still plague passive pixels. The read noise for passive pixels is high, and it is difficult to increase the array's size without exacerbating the noise. Ideally, the sense amplifier at the bottom of the column bus equally senses each pixel's charge, independent of the pixel's position on the bus. Realistically, low charge levels from far-off pixels provide insufficient energy to charge the distributed capacitance of the column bus. Matching access transistors is also a problem. The turn-on thresholds for the access transistors vary throughout the array, giving a nonuniform response to identical light levels. These threshold variations are one cause of FPN. Fortunately, noise problems are surmountable. For example, OmniVision produces a range of products that uses passive pixels (Table 1). Integrated analog-signal processing mitigates FPN. Analog processing combines correlated double sampling and proprietary techniques to cancel noise before the image signal leaves the sensor chip. An added advantage of processing in the analog domain is that analog-noise-cancellation circuits use less chip area than do digital circuits. OmniVision's pixels obtain a 70 to 80% fill factor. This on-chip sensitivity and image processing provide high-quality images, even in low-light conditions. The simplicity and low power consumption of the passive-pixel array lead to low-cost products that make machine vision suitable for applications that were formerly too expensive and power-hungry. Active photodiode pixels You can also overcome passive-pixel deficiencies by adding transistors to each pixel. Transistors buffer and amplify the photocharge onto the column bus. The CMOS APS alleviates readout noise and allows for a much larger image array. Several manufacturers offer standard products using APS arrays (Table 1). Active circuits in each pixel provide several benefits. In addition to the source-follower transistor that buffers the charge onto the bus, additional active circuits are the reset and row-selection transistors (Figure 2b). The buffer transistor provides current to charge and discharge the bus capacitance more quickly. The faster charging and discharging allow the bus length to increase. This increased bus length, in turn, increases the array size. The reset transistor controls integration time and, therefore, provides for electronic shutter control. The row-select transistor gives half the coordinate-readout capability to the array. Although you might think that adding these transistors to each pixel increases the device's power consumption, little difference exists between an active and a passive pixel's power consumption. However, the APS has some drawbacks. More pixels and more transistors per pixel aggravate threshold-matching problems and, therefore, FPN. Also, adding active circuits to each pixel reduces fill factor. APSs typically have a 20 to 30% fill factor, which is about equal to interline CCD technology. To counter the low fill factor, the APS borrows the microlens technique from CCDs to capture light that would otherwise strike the pixel's insensitive areas. Microlenses over every pixel focus the incident light onto the sensitive area. The microlenses double or triple the effective fill factor. Depositing the microlens on the CMOS image-sensor wafer is one of the final steps in the fabrication process. The photodiode APS image quality makes APSs increasingly popular for midperformance applications. Integrating analog and digital circuitry to suppress noise from readout, reset, and FPN enhances the image quality that these sensor arrays provide. APS pixels, such as those in Toshiba's parts, shrink as small as 5.6 µm2, which is almost as small as CCD pixels (Table 1). However, work continues on increasing CMOS APS array size and enhancing performance to compare with CCDs in scientific and low-light applications. The photogate APS borrows a charge-transfer technique to enhance the CMOS-sensor array's image quality. Figure 2c shows the photocharge occurring under a photogate. The active circuitry then performs a double-sampling readout. First, the array controller resets the output diffusion, and the source-follower buffer reads the voltage. Then, a pulse on the photogate and access transistor transfers the charge to the output diffusion. The buffer then senses the charge voltage. This correlated-double-sampling technique enables fast readout and mitigates FPN and reset noise at the source. A photogate APS builds on photodiode APSs by adding noise control at each pixel at the expense of greater complexity and less fill factor. Photobit (La Crescenta, CA) has custom imagers with readout noise as low as 5 electrons rms using a photogate APS. These noise levels for Photobit's imagers are even lower than those of commercial CCDs that typically have about 20 electrons rms read noise. By comparison, read noise on a photodiode passive pixel can be approximately 250 electrons rms and approximately 100 electrons rms on a photodiode APS. Even though low readout noise is possible on a photogate APS sensor array, you need analog- and digital-signal-processing circuits on the chip to get the image off the chip. CMOS vs CCD As with any new technology, research claims do not always translate well to mass production. As work continues in developing CCD, CMOS, and CMD pixels, it appears that each will have features suited to different vision applications. The CMOS wafer is low-cost, because multiple foundry sources support this mainstream technology. The CMOS image-sensor process closely resembles those of µPs and ASICs because of diffusion and transistor structures. Several metal layers and and two-layer polysilicon are optimal for producing image sensors. The difference between CMOS-image-sensor and the most advanced ASIC processes is that the decreasing feature size works well for logic circuits but does not benefit pixel construction. Smaller pixels mean lower light sensitivity and dynamic range; thus, even though the logic circuits decrease in area, the photosensitivity area can shrink only so far before diminishing the benefit of less silicon area. However, the standard CMOS flow at most, if not all, foundries requires implant optimization to produce quality CMOS image-sensor arrays. Also, mixed-signal capability is important for producing both the analog circuits for transferring signals from the array and the analog processing for noise cancellation. In addition to implant optimization and quality analog capability, a standard CMOS process lacks processing steps for color filtering and microlens deposition. Most CMOS foundries also exclude optical packaging. Optical packaging requires clean rooms and flat-glass techniques that make up much of CCD-chip cost. The cost advantage of standard CMOS processing over CCDs remains unclear to some observers. A clear advantage, however, is that CMOS imagers require only one supply voltage compared with the three or four that CCDs need. CCDs need multiple supplies to transfer charge from pixel to pixel and an additional supply to reduce dark-current noise using "surface-state pinning," which is partially responsible for CCDs' high sensitivity and dynamic range. Eventually, high-quality CMOS sensors may revert to this technique to increase sensitivity by reducing dark currents. Estimates of CMOS power consumption range from one-third to 100 times less than that of CCDs. A CCD-sensor chip actually uses less power than the CMOS, but the CCD support circuits use more power (Table 2). When analyzing the power consumption for a CMOS-based system, power saving ranges from one-third to one-tenth that of a CCD-based system, depending on the application. Products that depend on batteries can benefit from CMOS image sensors. CMOS image arrays also have the X-Y coordinate readout that the array architecture provides. This readout facilitates windowed and scanning readouts that can increase the frame rate at the expense of reduced resolution. Windowed readouts provide for electronic zoom functions. You can also perform an accelerated readout by skipping lines or columns to do such tasks as view-finder functions. On the other hand, CCDs perform a readout by transferring the charge from pixel to pixel in a scheme that requires reading the entire image frame. You can quickly read out most modern CCDs, such as interline CCDs that separate the charge-transfer buckets from the photosite. CCDs can have short integration because of higher sensitivity and faster readouts for high-performance imaging applications, such as sensing data from optical mass-storage systems or producing high-quality video images with fast frame rates that are possible only with CCDs. Another advantage to CMOS sensors is the ability to integrate DSP. Integrated intelligence is convenient in such applications as digital fingerprint-ID systems that compare a fingerprint with a stored pattern to determine authenticity. An integrated DSP leads to a low-cost and smaller product. These criteria outweigh sensitivity and dynamic response in this application. However, midperformance and high-end-performance applications can more efficiently use two chips. Separating the DSP and microprocessor from the sensor protects it from the heat and noise that digital logic functions generate. A digital interface between the sensor and the processor chips requires digital circuitry on the sensor. CMOS pixel arrays have some disadvantages as well. CMOS pixels that incorporate active transistors have reduced sensitivity to incident light because of less light-sensitive area. Less light sensitivity reduces the quantum efficiency to far less than that of CCDs of the same pixel size. The added transistors overcome higher noise-to-signal ratio during readout but introduce some problems of their own. The CMOS APS still has readout-noise problems because of uneven gain from mismatched transistor thresholds. CMOS pixels also have a problem with dark, or leakage, current. A performance comparison of a CCD, a bulk CMD (BCMD) with two transistors per pixel, and a CMOS APS with four transistors per pixel, all from Texas Instruments, shows the advantages, disadvantages, and differences in performance of each technology (Table 2). All three devices have the same resolution and pixel size. The CCD chip is larger, because it is a frame-transfer CCD, which includes an additional light-shielded frame-storage CCD into which the image quickly transfers for readout so the next integration period can begin. The varying fill factors and quantum efficiencies show how the APS sensitivity suffers from having active circuits and associated interconnects. As mentioned, microlenses would double or triple the effective fill factor but would add to the device's cost. The BCMD's sensitivity is much higher than that of the other two sensor arrays because of the gain from active circuits in the pixel. If you divide the noise floor, which is the noise generated in the pixel and signal-processing electronics, by the sensitivity, you arrive at the noise-equivalent illumination. This factor shows that the APS device needs 10 times more light to produce a usable signal from the pixel. The small difference between dynamic ranges points out the flexibility for designing BCMD and CMOS pixels. You can trade dynamic range for light sensitivity. By shrinking the photodiode, the sensitivity increases, but the dynamic range decreases. CCD and BCMD devices have much less dark current because they employ surface-state pinning. The pinning keeps the electrons released under dark conditions from interfering with the photon-generated electrons. The dark signal is much higher in the APS device because it does not employ surface-state pinning. However, pinning requires a voltage above or below the normal power-supply voltage; thus, the BCMD needs two voltage supplies.
The best image sensors require analog-signal processing to cancel noise before digitizing the signal. The charge-integration amplifier, S/H circuits, and correlated-double-sampling circuits are examples of required analog devices. One of the most often-cited advantages of CMOS APS is the simple integration of sensor-control logic, DSP and microprocessor cores, and memory with the sensor. Digital functions add programmable algorithm processing to the device. Such tasks as noise filtering, compression, output-protocol formatting, electronic-shutter control, and sensor-array control enhance the device. This digital-logic integration re-quires an on-chip to ADC match the performance of the intended application. Consider that the high-definition-television format of 720×1280-pixel progressive scan at 60 frames/sec requires 55.3M samples/sec, and you can see the ADC-performance requirements. In addition, the ADC creates no substrate noise or heat that interferes with the sensor array.
Color with CMOS image sensors Adding color filters is one of the final steps in producing sensor arrays. In the visible-light spectrum, silicon absorbs red light at a greater average depth than it absorbs green light, and blue light releases more electrons near the chip surface. Indeed, the yellow polysilicon coating on CMOS chips absorbs part of the blue spectrum before its photons reach the photodiode region. Analyzing these factors to determine the optimal way to separate the visible spectrum into the three color bands is a science beyond most chip makers' capabilities. High-quality color separation in CMOS imagers differentiates sensor products. Eastman Kodak and Motorola are working together to optimize the ImageMOS process by avoiding the need to expose pixels through any yellow polysilicon. In addition, the color layers added to each pixel use Kodak's proprietary scheme for color separation. Another partnership joins the color experts at Polaroid with the CMOS experts at Atmel. Depositing color dyes as filters on the wafer is the simplest way to achieve color separation. The three-color pattern deposited on the array covers each pixel with one primary-color-system (RGB) or two complementary-color-system colors (cyan, magenta, yellow, or CyMY) so that the pixel absorbs only those colors' intensities in that part of the image. CyMY colors let more light through to each pixel, so they work better in low-light images than do RGB colors. But, ultimately, images have to convert to RGB for display, and you lose color accuracy in the conversion. RGB filters reduce the light going to the pixels but can more accurately recreate the image color. Whether you use RGB or CyMY, reconstructing the true color image by digital processing somewhat offsets the simplicity of putting color filters directly on the sensor array. But, integrating DSP with the image sensor enables more processing-intensive algorithms at a lower system cost to achieve color images. Companies such as Kodak and Polaroid develop proprietary filters and patterns to enhance the color transitions in applications such as still photography. With the recent development of low-cost image sensors, companies are developing more products that include vision. Cameras can now go into products in which they were previously too expensive or bulky. With the big names in color imaging, such as Kodak and Polaroid, involved, image-sensor quality will continue to improve. Watch for the large semiconductor companies with excess CMOS-fabrication capacity to enter image-sensor production. Don't be surprised to see new, low-cost CCDs and CMDs competing for a place in these new machine-vision and camera products.
Acknowledgments Thanks to Paul Suni of Suni Imaging, Eric Fossum of Photobit, and Jerry Hynecek of Texas Instruments for help in understanding solid-state image-sensor technology. |
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| Copyright © 1997 EDN Magazine, EDN Access. EDN is a registered trademark of Reed Properties Inc, used under license. EDN is published by Cahners Publishing Company, a unit of Reed Elsevier Inc. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Table 1--Representative CMOS image-sensor chips | |||||||
| Company | Product | Resolution (horizontal× vertical pixels) | Lens format |
Special features | Power consumption (V/mW) |
Package | Price |
| C-Cam Technologies | FUGA 15 | 512×512 | 2/3 in. | CMOS APS; random-addressable pixels; 5-MHz pixel rate; 120-dB logarithmic response; on-chip ADC; both black and white and RGB | 5/50 | 48-pin CLCC and PLCC | $333 (black and white) |
| FUGA 24 | 2048×1 | 1 in. | CMOS APS; random-addressable pixels; 5-MHz pixel rate; 120-dB logarithmic response; on-chip ADC, black and white; 7×7- or 7×35-µm user-defined pixel size | 5/50 | To be defined | $333 (black and white); available November 1997 |
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| FUGA 18 | 8013 (retina shaped) |
2/3 in. | CMOS APS; random-addressable pixels;100-kHz pixel rate; 120-dB logarithmic response; analog output; 400- to 900-nm spectral response; black and white and RGB | 5/50 | 48- and 68-pin CLCC and PLCC | $583 (black and white) |
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| FUGA 22 | 2048×2048 | 1 in. | CMOS APS; random-addressable pixels; 3-MHz times 8-bit parallel out-put-pixel rate;120-dB logarithmic response; analog output; black and white | 5/50 | 84-pin ceramic J-lead | $4000 | |
| Chrontel | CH5001 | 352×288 | 1/2 in. | Color camera IC; CCIR601-format digital output; 1/30 to 1/15,734-sec electronic shutter; gamma correction; color-space converter; frame color | 5/500 | 52-pin LCC | $29 (1000); samples |
| OmniVision | OV5006 | 320×240 (60 Hz), 352×258 (50 Hz) | 1/3 in. | Black-and-white, single-chip camera with analog output; either EIA or CCIR compatible; passive CMOS sensor | 5/100 | 28-pin LCC | $12 (10,000) |
| OV5007 | 384×288 | 1/4 in. | Black-and-white, single-chip camera with 8-bit digital output; passive CMOS sensor | 5/200 | 48-pin LCC | $14 (10,000) |
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| OV7200 | 768×576 | 1/3 in. | Black-and-white, single-chip camera with 8-bit digital output; passive CMOS sensor | 5/250 | 48-pin LCC | $18 (10,000); samples |
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| OV6003 | 352×240 | 1/3 in. | Color, single-chip camera with analog output in NTSC/YC, RGB, or YUV format; passive CMOS sensor | 5/150 | 48-pin LCC | $16 (10,000) |
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| OV6600 | 352×288 | 1/3 in. | Color, single-chip camera with digital output in CCIR601/656 interface; passive CMOS sensor | 5/250 | 48-pin LCC | $18 (10,000); samples |
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| Texas Instruments | TSL218 | 512×1 | 200 dpi | CMOS APS; analog output 0 to 2V with S/H | 5/120 max | Seven-pin SIP | $21.25 (1000) |
| TSL1401 | 128×1 | 400 dpi | CMOS APS; electronic shutter (hold); analog output 0 to 2V with S/H | 5/20 max | Eight-pin DIP | $3.42 (1000) |
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| TC-286 | 640×480 | 1/3 in. | Bulk charge-modulated device; color; random-line addressable; 0 to 5V clocking levels | 3.3/150 | 36-pin SOP | $25 (100,000); samples |
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| TC-288 | 640×480 | 1/3 in. | Color CMOS APS | 3.3/110 | 36-pin SOP | $20 (100,000); available December 1997 |
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Toshiba |
TCM500-3D | 692×504 | 1/3 in. | RGB; variable electronic shutter; 30-frame/sec image rate; CMOS APS; 5.6×5.6-µm pixel |
3.3/30 | 16-pin DIP ceramic | $30 (10,000); available December 1997 |