November 20, 1997

Pulse discriminator excises narrow pulses

Mark Vitunic, Micro Linear, San Jose, CA

The circuit in Figure 1 deletes narrow pulses from fixed-frequency PWM waveforms. The output of the circuit effectively represents a delayed version of the input with both low and high narrow pulses deleted. Unlike using a lowpass filter to remove narrow pulses, this circuit preserves the width of pulses wider than the circuit's RC time constants.

A pulse discriminator is useful for a PWM signal that serves as an input to a power inverter that in turn drives an electric motor. Deleting narrow pulses results in reduced inverter switching losses with no perceivable difference in motor response due to the high motor time constant. This circuit also eliminates the potential of a narrow pulse discharging the bootstrap capacitor in a high-side driver.

Q₁, R₁, and C₁ implement an inverting delay circuit, which produces a signal at node A that has fast high-to-low transitions and slow low-to-high transitions. Node A is the clock input to a D flip-flop, IC₁. Q₂, R₂, and C₂ implement a second inverting delay circuit that produces fast low-to-high transitions and slow high-to-low transitions at node B. Node B is the flip-flop's reset input.

If the input pulse width, low or high, is shorter than 0.693×R₁×C₁ or 0.693×R₂×C₂, respectively, the delayed pulses at nodes A and B do not trip the CMOS-logic thresholds at the input of IC₁. The values of R₁ and R₂ differ slightly because the CMOS-logic threshold of IC₁ is not perfectly symmetrical with respect to V_DD.

With the values of the RC time constants in Figure 1a, the circuit deletes pulses approximately equal to 3 µsec or less. Input and output waveforms of the circuit using a 25-kHz PWM input with pulse widths of 2.5, 10, 20, 30, and 37.5 µsec show the removal of the 2.5-µsec pulses (Figure 1b). To improve the pulse-width control, you can replace R₁ and R₂ with fixed-value current sources. (DI #2118)

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