EDN Access

December 18, 1997


LCD interface saves µC I/O pins

Robert Wells, ETR, Moab, UT

Although in abundant use, mini µPs suffer from a low I/O-pin count, which places each pin at a premium. Interfacing a bus-type device, such as an alphanumeric LCD, can use most of the I/O pins. Even placing the display in the 4-bit transfer mode still can cost as many as seven lines. An easier way to save pins uses a lowly 74HC164 shift register to cut the pin count to four I/O lines, PA0 to PA3 (Figure 1).

You never read back from the display, so tying the R/W line low makes sense and saves one I/O line. The µP bit-bangs the data byte out to the shift register before strobing the display's RS and EN lines. (Click here to download an example of the assembly file DI-SIG, #2117.)

This configuration is so successful that it works well in many designs with many µCs and µPs, from the tiny MC68HC705K1 to a DSP56156. Using this design with displays ranging from 4×2 to 40×4 characters/line produces no perceptible flicker. By cascading shift registers and adjusting the software accordingly, you can also use this shift-register interface with the ISD (San Jose, CA) sound-recorder chips or with any device that uses an 8-, 10-, 12-, or 16-bit bus interface. (DI #2117)


Figure 1

24DI2117

A lowly 74HC164 shift register helps reduce to four the number of I/O lines necessary to drive an alphanumeric display.


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