December 18, 1997

Current limit protects power bus

Ron Lenk, Temic/Siliconix, Santa Clara, CA

The circuit in Figure 1 protects a power bus from a load short within a guaranteed 2 µsec; a short could otherwise pull down the bus, affecting other loads. The circuit also controls inrush current to bypass capacitors during hot-swap (hot insertion), another situation in which bus voltage could otherwise experience a droop. You can individually set the two current limits. Power-on reset and logic controls allow complete µP interfacing.

A short at the load causes current-sense resistor R₁ to produce a voltage. IC₁ senses this voltage and subsequently turns off n-channel MOSFET Q₁ within 2 µsec. This time is fast enough that the power bus's capacitors don't droop significantly. For example, within 2 µsec, even a 50A short produces only a 100-mV droop on a bus with 1000 µF of capacitance. R₂ sets the current level at which the IC detects a short. L₁ and C₁ generate gate drive for Q₁. After a time set by C₄, the current slowly ramps up at a rate set by C₂ to determine if the short is still present. If this short still exists, the cycle repeats.

During normal start-up and when charging the load's capacitors, such as C₃, the design permits current beyond the short-circuit limit to pass. Taking the value of R₃ and tying the HI/LO pin to V_CC set this second current level. The current is still low enough that the power bus is unaffected. You can easily interface this circuit to a µP using the IC's RESET, STATUS, and ENABLE lines. (DI #2133)

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