January 1, 1998

Current limiter provides latch-up signal

Hartmut Henkel, von Hoerner & Sulger GmbH, Schwetzingen, Germany

CMOS ICs in space applications pose the risk of latch-up: Ionizing radiation can trigger the intrinsic thyristor of the CMOS structure. The result is a low-impedance path between the supply rails. If the supply has no current limiting, the latch-up current destroys the IC. Limiting the supply current to a value lower than the hold current of the thyristor allows the IC to recover from the latch-up condition. A higher current limit holds the IC in latch-up, a nondestructive condition if the IC does not overheat. It's useful to detect such a condition; a short supply interruption can then bring the IC back to normal operation. Figure 1 shows a current limiter for latch-up protection. The components for this circuit are available in high-rel, rad-hard versions.

R₂ senses I_R approximately equal I_LOAD. The voltage drop in R₃ determines Q₂'s emitter current: I₂ approximately equal (V_CC-1.4)/R₃, approximately 0.5 mA, which the Q₃-Q₄ pair attempts to mirror to Q₁'s collector. With nominal load current, the voltage drop in R₂ is small. The base of Q₁ thus remains at a high potential, giving Q₁ a base-emitter voltage too low to produce the collector current that the Q₃ current mirror requests. Consequently, Q₃'s V_CE is low, and the p-channel MOSFET, Q₅, turns fully on. When I_R increases to a value at which I_RR₂=I₁R₁, the base-emitter voltages of Q₁ and Q₂ are equal, and I₁ approximately equal I₂. Transistors Q₁ through Q₄ now have the same collector current, and Q₃'s V_CE rises, gradually shutting off Q₅. The current limit is thus I_R(LIMIT) approximately equal I₂R₁/R₂, in this case, approximately 104 mA.

One advantage of this limiter is that it operates with a nominal voltage drop of less than 190 mV in sense resistor R₂. Also, the base-emitter threshold voltages of the transistors do not influence the current limit, as long as thermal tracking exists between Q₁ and Q₂ and between Q₃ and Q₄. The current limit is thus stable over a wide temperature range. You can apply the limiter to a single CMOS IC or to small groups of ICs. The size of the group depends on the nominal group supply current and the ability of single ICs to survive a latch-up condition with the given group current limit.

The comparator circuit in Figure 1 provides detection of a pending latch-up condition. The comparator senses whether the load voltage sinks below a given threshold. The comparator can then generate an interrupt to a supervising controller. You can use the circuit to effect board-level latch-up detection and power cycling. The wired-AND gate, using one diode per current limiter, can supervise the current-limited supply voltages of several ICs or IC groups. Tests with an HCF4093BE CMOS IC (not rad-hard) show that instantaneous latch-up recovery occurs with a current limit lower than 120 mA; the latch-up condition is self-sustaining with higher current limits. The values depend on the IC's type, technology, and temperature; you need to perform tests to determine the optimum current limit for a given CMOS IC. (DI #2138)

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