| |
|
February 16, 1998
W Kurdthongmee, Nakorn Si Thammarat, Thailand
 In µP/µC systems, you sometimes need
to use many output ports and update all the ports simultaneously. For instance, in systems
that use multiplexing techniques, the output ports require refreshing for every scanning
period. One example is a system of multiple dot-matrix LEDs. Suppose that an N-column,
8×8 LED matrix uses a row-scanning technique.  Every eight-dot column of the nth LED connects to the nth
port (n=1...N) and the mth row (m=0...7), in which row a switching transistor
controls all the LEDs. To update each row, the row's switching transistor turns off, and
all N ports receive an update from the display buffer. The switching transistor for that
row then turns on. The method in Listings 1 and Listing 2 and Figure 1 allows you
to simultaneously update all N output ports.
 Two approaches are available for
implementing the parallel-output port. In the first approach, every output port has its
own address. The address-enable lines of the output ports connect to the chip decoder. To
update the output ports, the application program needs to directly refer to the port's
address (Figure 1a). The native MCS-51 assembly routine in Listing 1 simultaneously updates all N output ports in the
configuration of Figure 1. Assume the addresses of these
ports are OUTPUT_PORT0, OUTPUT_PORT1, OUTPUT_PORT1+1...OUTPUT_PORT(N1).
Alternatively, you can connect all the output ports in the configuration
of Figure 1b. In this method, only one address refers to all
the output ports. For example, to update all N ports, the application program must refer
to the ports' address and then iterate the following steps N times: Read data from address
N from the buffer, route the data to the referred port, and let N=N1.
Note that, in the above example, data from location n in the buffer
updates the nth port, where n is between 0 and N1. Listing
2 is the MCS-51 native routine to simultaneously update the output ports. Assume
that the single address of the N ports is OUTPUT_PORT. By using this single-address
configuration, you do not need to refer to output ports' addresses every time you need to
update them. You thus eliminate one instruction in the update loop, making the routine
shorter and faster. This routine is suitable for implementation in an interrupt-service
routine. (DI #2151)
Daryl Christopher, Juniata College, and
Tom Fisher, Inexpensive Systems, Huntingdon, PA
 It is sometimes desirable to display
the output of a PIC µC graphically, rather than numerically. However, the operation
increases system complexity and expense. In addition to the LCD itself, you usually need a
graphics controller and at least 1 kbyte of RAM. However, you can obtain a satisfactory
plot (Figure 1) without the use of a controller or any RAM.
At first glance, the parameters seem daunting. The least expensive graphics LCDs (for
example, the Optrex DMF696, at $39.51 from Digikey (Thief River Falls, MN)) have a
resolution of 128×64 (width×height) pixels, which equates to 1024 bytes. A midrange PIC
µC, such as the PIC 16C37A, has only 192 bytes of RAM available, including whatever you
need for program variables.
 Furthermore, you must frequently
refresh the LCD: Optrex recommends a 70-Hz rate. The PIC's cycle time (the time it takes
the µC to execute one command) is 200 nsec. The µC divides a 20-MHz oscillator input by
4 to produce the 5-MHz cycle frequency. Because the LCD needs 8192 pixels at an
approximate 70-MHz refresh rate, the PIC has the time to issue only approximately nine
commands for each pixel. Moreover, this time must include the timing pulses (Figure 2) as well as the data.
The key to matching the PIC's capabilities to the task is recognizing that
a graph is a specialized display. The plot is of a single-valued function of y vs x, so
the display has 128 points at any time. The majority of the pixels carry no information
whatsoever. Inasmuch as the maximum resolution possible on the vertical axis is only one
part in 64, 1 byte (1-in-256 resolution) is more than adequate to contain one datum, and
the 192 bytes of PIC RAM is more than enough for the plot. (To allow for borders, the
graph in Figure 1 actually has a plottable area of only
120×53 pixels.)
 Another problem is to write code that
is terse enough to maintain the required refresh rate. The fastest way to move a
bit (pixel) out of the PIC is to rotate it through the carry flag and into an output port.
This operation would normally mean wasting an entire output port, because the remainder of
the port's pins would always contain "stale" shifted pixels.  However, the PIC allows A/D input through pins designated for digital
input, so all the I/O pins are usable. Figure 3 shows the
PIC 16C73 port assignments. Listing 1 shows the code
fragment that displays a single pixel on the screen.
Note that the routine requires only six cycles. However, if you include
the start-of-line pulse (CP1, two cycles), subroutine calls (two cycles), and other
overhead, the worst case requires 12 cycles. This time budget results in an unacceptable
refresh rate of approximately 50 Hz.  The screen areas that require unchanging information, such as borders, tick
marks, and labels, are stored in program ROM. Because it would take too many cycles to
recover this data from look-up tables (which are cumbersome in the PIC), you code each
byte explicitly and clock them out 1 bit at a time using the routine in Listing
2.
You need approximately 700 lines of repetitious coding and a large, binary
shape table to specify the static information; a good editor simplifies this chore. You
implement a blinking x-axis cursor by periodically replacing the datum in the appropriate
RAM location with 255 decimal. This operation has the effect of drawing a flashing
vertical line above the pointed-to datum. By setting 64 screen scans with and 64 without
the 255, you obtain a blink rate of approximately 2 sec. You control the
cursor's position by rotating a 50-kiloohms potentiometer that feeds the PIC's
A/D converter through Pin RA2. As the cursor moves, the x and y coordinates of its
position display numerically at the bottom of the graph. The updatable, three-digit x and
y positions (requiring a total of 6 bytes of RAM) make up a classic character generator,
with each numeral's shape stored in 7 bytes of RAM.
It is essential to frequently update the screen to continuously reverse
the polarity of the LCD's electrodes and thus prevent the destruction of the display. The
M line takes care of this operation by switching the polarity at the beginning of each
screen scan. Although it is possible to invoke short routines between scans, if the PIC
must perform lengthy routines, it is necessary to blank the screen by using a call to
Erase_Screen. The program requires approximately 1.4 kbytes of program memory (in Page 1
ROM) and 135 bytes of data RAM. You can download the program as an MPASM 1.40-compatible
source file by clicking here: DOWNLOAD.
Although using a PIC µC as an LCD controller/video RAM imposes severe restraints on what
you can display, this approach reduces complexity and cost for simple graphs. (DI #2153)
Richard Panosh, Vista, Bolingbrook, IL
 Metal garage doors may be solid and
secure, but they are not transparent to radio waves. If your garage has aluminum siding,
you may experience frustration with the operation of your garage-door opener. If you must
drive up to the door and nearly touch it or drive near a window to activate the door
opener, this Design Idea is for you. The antenna extension in Figure
1 moves the receiving antenna beyond the door so the system can respond to your
command.
Construction is simple. The antenna is completely passive and uses a
J-pole design. The antenna uses readily available 300 ohm flat TV twin-lead and RG-174 50
ohm miniature coaxial cable. The length suits an opener that operates at 310 MHz. Most
popular openers, such as Stanley, Genie, and Chamberlain, operate at this frequency.
However, some units operate at 315 MHz, some replacement controls operate at 390 MHz, and
some automobile manufacturers offer 380-MHz designs. You can usually find the operating
frequency in the user's manual, or you can obtain it directly from the manufacturer.
A J-pole antenna consists of a half-wave antenna matched to the low
impedance of the coaxial cable by means of a quarter-wave matching stub. In Figure 1, the half-wave antenna comprises the piece of wire
above the notch cut into one side of the 300 ohm flat TV twin-lead cable. You solder the
lower ends of the stub together. Experiments show that the optimum location of the coaxial
tap is 7/8 in. above the shorted end. You use 14 ft of RG-174 coaxial cable as the
lead-in. Route this lead above the garage door and out through the weather stripping
without drilling any holes. Be sure that the center conductor of the coaxial cable
connects to the half-wave side of the twin-lead and that the ground braid connects to the
notched side of the twin-lead. Solder both these connections and cover them with clear
silicone rubber to protect them from weather conditions.
Prepare the end of the coaxial cable that connects to the existing
garage-door antenna by exposing the center conductor and soldering on a 6-in. length of
hookup wire. You can insulate the connection with heat-shrink tubing or tape. Twist the
hookup wire tightly around the existing antenna wire for its full length to form a gimmick
capacitor suitable for coupling the signal into the receiver without unduly loading the
receiver and altering its characteristics. Secure the shield of the RG-174 coaxial cable
to the frame of the door opener to effectively ground it. You can locate the antenna above
the garage door on the wood trim. Do not staple across the 300 ohm twin-lead.
Mount the twin-lead to the door using adhesive pads and nylon cable ties
or by means of a single small nail or screw at each end through the center web of the
twin-lead. You can attach the coaxial cable to the garage rafters or ceiling with the same
nylon cable ties and adhesive to keep it out of the way of moving parts. Route the cable
above the door to allow normal operation of the door and out below the garage-door header
beam so that the door's weather stripping seals when the door closes.
The addition of this antenna extension to any garage-door opener markedly
increases operating range. Measurements show an improvement of approximately 2.5 dB,
equivalent to a 30 to 40% increase in range. The improvement is especially noticeable for
installations in which the garage is effectively shielded by metal doors, metal siding,
and a lack of windows. (DI #2152)
Arthur Harrison, US Army Research Laboratory, Adelphi, MD, and
Joseph Stern, Maxim Integrated Products, Sunnyvale, CA
 In the proximity detector of Figure 1, a 4-in.-sq piece of copper-plated pc board serves as
an antenna that forms one plate of a capacitor. An approaching (grounded) person serves as
the other plate, producing a capacitance value of 2 to 5 pF that increases as the person
approaches. At 6 in. from the copper plate, for example, the person produces a capacitance
value of approximately 2 pF.
 A simplified circuit illustrates how
the circuit transforms distance/capacitance into a proportional voltage (Figure 2). Transitions of the input square wave apply directly
to the lower input of the exclusive-OR (XOR) gate but are delayed 0.693×R1×C1
sec before the comparator reconstructs the transitions and applies them to the upper XOR
input. R2 and C2 filter the resulting XOR output to produce a
voltage proportional to distance.
The XOR output's duty cycle is proportional to the sum of the R1-C1
network's delay and the comparator's propagation delay, so a small variation in comparator
delay can mask small changes in antenna capacitance. The circuit in Figure
1 overcomes this limitation using a dual comparator (IC1). Passing the
XOR inputs through nearly identical comparators largely nullifies the effect of
offset voltage, drift, and propagation delay through the comparators.
Figure 1's delay capacitance consists of a
33-pF capacitor, C1, in parallel with 15 pF (6 in. of coaxial cable at 30 pF
per foot) and the 4-in.-sq antenna plate. This capacitance charges to 5V through R1
during each positive half cycle of the input square wave. When no one is near the
detector, this capacitance equals 48 pF and produces a delay of 16.5 nsec at the upper XOR
input. With a hand 6 in. from the detector, the capacitance rises to 50 pF and produces a
delay of 17.3 nsec, yielding a time difference of only 0.8 nsec.
To detect such small time differences--over temperature and with
accuracy--the comparators must be stable in offset voltage and propagation delay. (Changes
in offset voltage as well as propagation delay affect delay time.) One 10-nsec comparator
is generally stable to within 1 nsec. To resolve subnanosecond intervals, use the
dual-comparator approach of Figure 1, which increases the
useful resolution by a factor of four to five.
Op amp IC2A offsets and amplifies the dc voltage at TP1,
which corresponds to the distance between hand and antenna plate. A hand movement toward
the antenna causes the voltages at TP1 and TP2 to rise. IC2B
and Q1 serve as a comparator with hysteresis, which compares the TP2
voltage with 2.5V. Thus, any TP2 voltage above 2.5V (which corresponds to a
proximity of 6 in.) turns on the LED. You can adjust potentiometer R2 to set a
threshold other than 6 in., and you can connect a DVM at TP2 to read out the
proximity in inches. R3 adds hysteresis to ensure a well-defined transition.
To ensure frequency stability for the high-speed dual comparator in Figure 1, the copper-clad pc board should have a ground layer
in addition to the circuit layer. Power-supply bypassing should include 0.1-µF ceramic
capacitors that sit very close to the comparators' supply terminals. (DI #2150)
Paul C Florian, Plano, TX
 The low-cost, three-transistor boost
switching regulator in Figure 1a is a modified astable
multivibrator comprising Q1, Q2, and L1, which
substitutes as a load for Q2. At the full output power of 200 mW, the
oscillation frequency is approximately 60 kHz. The efficiency is 65% with VOUT
equal to 24V and sourcing 8 mA.
When the base of Q2 is high, energy stores in L1's
magnetic field. When the circuit drives the base of Q2 low, the induced voltage
from L1's magnetic field collapses to add with the supply voltage. This voltage
spike charges C1 through D1. When the accumulated charge in C1
results in a voltage equal to the zener voltage of D2 plus 0.6V, Q3
pulls Q2's base to ground, decreasing the amount of time Q2 is on in
subsequent oscillations and thereby decreasing the energy transferred to C1.
This feedback through D2 regulates the output voltage to 24.6V±the tolerance
of D2. To change the output voltage of the circuit, simply change the zener
voltage of D2.
Many VCOs require tuning voltages as high as 20V, and you can use this
switching regulator to generate a 0 to 20V tuning voltage from a 0 to 5V control voltage (Figure 1b). The circuit configures one-half an LM358N as a
noninverting amplifier with a gain of 4. C1 eliminates gain for the noise
generated by the 24V supply. You can manually adjust the tuning voltage using R1
or control the voltage using feedback from a PLL. (DI #2159)
Warren Jochem, Research Triangle Institute, Research Triangle Park, NC
 The circuit in Figure
1 allows you to record process variables (4 to 20 mA, 0 to 10V dc) on a
three-phase power monitor designed to record only ac waveforms. Many of these recorders
have a seventh channel, normally used for recording neutral current, which you can use as
a process-variable input. The circuit operates by generating a 0 to 1V-rms output sine
wave whose amplitude is a function of a 0 to 10V-dc input signal. IC1 can be
any rail-to-rail quad op amp rated for ±5V power supplies. Input stage IC1A
buffers the input-voltage divider R1-R2 and drives the two-quadrant
multiplier, IC1B. IC1B acts as a multiplier by using Q1
to switch its gain from 1 to 1.
When Q1 is off, IC1B has a gain of 1. Switching Q1
at 60 Hz chops the dc signal applied to the input into a 60-Hz square wave whose amplitude
is proportional to the input signal. The chopping signal comes from Schmitt trigger IC1C.
A portion of the ac power signal goes to IC1C through voltage divider R8-R7.
R9 and R10 provide a small amount of hysteresis to prevent
oscillation and ensure fast switching. The output of IC1C is the 60-Hz square
wave that controls Q1. The chopped signal from IC1B connects to the
switched-capacitor filter, IC2. This eight-pole lowpass filter converts the
square wave from IC1B to a sine wave.
Capacitor C2 sets the filter's 71-Hz cutoff frequency. C5
and R6 form a 16-Hz highpass filter that removes any dc offset from the output
of the switched-capacitor filter. IC1D buffers the filter and provides a 0 to
1V-rms, 60-Hz output. Calibration involves applying a 10V-dc signal to the input and
adjusting R2 until the output reads 1V rms on an ac voltmeter. Measurements
show linearity within ±1% over the entire input range. To use the recorder, connect the
input to the process variable under measurement, and connect the output to any
voltage-input channel on the 1V-rms power recorder. You can also use the circuit on
current-input channels designed to use low-voltage, 1V-rms current clamps. To record 4- to
20-mA signals, shunt the input with a 500 ohm resistor. (DI #2157)
|
