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March 2, 1998
WHAT'S HOT IN THE DESIGN COMMUNITY
The EZ-USB family of ICs from Anchor Chips integrates a high-performance
microcontroller, includes hardware support for low-level USB signaling, and takes a new
tack to maximize flexibility in the USB enumeration procedure. These features
differentiate Anchor's ICs from most other USB ICs and provide a single-chip USB
implementation that can serve in applications ranging from cost-sensitive peripherals,
such as pointing devices, to high-end devices, such as scanners.
The IC incorporates an 8051-compatible core with support from a legion of
software-development tools from multiple vendors. Moreover, the core offers a fivefold
boost in perform-ance over off-the-shelf 8051 ICs. In addition, although most
manufacturers minimize prices by using the microcontroller to handle low-level signal
handshakes, the EZ-USB ICs include state machines that offload these task from the
microcontroller. The hardware signaling leaves the microcontroller free to handle more
peripheral functions and, therefore, allows designers to use the IC in more complex
devices.
The ICs also use an enumeration scheme to maximize flexibility in peripherals via
downloadable control firmware. The USB standard specifies that a peripheral must go
through an enumeration procedure whenever the peripheral connects to the bus. During this
procedure, the host assigns the peripheral a unique ID, and the peripheral provides the
host with device descriptors that indicate the peripheral's capabilities.
In contrast, the EZ-USB ICs go through this enumeration procedure and establish a
baseline configuration. The ICs then download new firmware from the host, simulate a
disconnect/reconnect cycle, and repeat the enumeration, providing updated descriptors to
the host. This software-based configuration scheme offers several advantages. For
example, it simplifies software updates to peripherals, a feature that can be important in
a new interface, such as USB. The software-based configuration also enables you to develop
multifunction peripherals. A DSP-based peripheral could take on the role of a modem during
one session, for example, and an audio synthesizer during another session.
The company offers three versions of the EZ-USB. The AN2131S integrates 8 kbytes of RAM
and 16 I/O lines and costs $6.36 (10,000). The AN2131Q adds eight more I/O lines and costs
$7.31 (10,000), and the AN2141Q increases memory to 16 kbytes of RAM for $8.72 (10,000).
Anchor also offers an EZ-USB Xcelerator development kit for $495. The kit includes a
development board, an 8051 compiler, a general-purpose USB device driver, and sample
firmware and driver code.
--by Maury Wright
Anchor Chips, San Diego, CA. 1-619-613-7900, www.anchorchips.com.
Firewire VXI slot-zero controller is
first, fast, and low-cost
Hewlett-Packard's C-size E8491A slot-zero controller and host-computer interface may be
the first IEEE 1394 (Firewire) test-and-measurement hardware. The device transfers data
bursts at 400 Mbps (50 Mbytes/sec). This speed accommodates the VXI bus' 40-Mbyte/sec
transfer rate. Although observers call Firewire fast and elegant but costly, the E8491A
costs only $2500. HP claims that the E8491A makes the cost of Firewire only $300 higher
than that of products employing IEEE 488, whose transfer rate is less than 2% that of
Firewire's. Compared with the MXI bus, which has become the standard for linking VXI cages
to external host PCs, Firewire is both less expensive (the savings over HP's MXI interface
can exceed $3500) and faster (50 vs 32 Mbytes/sec).
Cabling is another advantage of the serial Firewire bus over IEEE 488 and MXI, both of
which are parallel. Despite the need for good high-frequency characteristics, Firewire's
six-conductor cable is smaller in diameter and more flexible than IEEE 488 and MXI cables,
which have more conductors. Moreover, a full Firewire network with 16 nodes can extend to
72m (236 ft), whereas MXI and IEEE 488 networks should extend no farther than 20m (66 ft).
According to HP, Firewire's built-in plug-and-play support make the interface easier to
integrate than other interfaces. Drivers for 32-bit operating systems accompany the
Adaptec PCI bus/Firewire host PC adapter that HP ships with the E8491A. HP is also working
on explicit support for the E8491A in the VEE visual-programming system for
test-and-measurement applications.
--by Dan Strassberg
Hewlett-Packard Co, Palo Alto, CA. 1-800-452-4844,
www.hp.com/go/tmdir.
Bus switches offer system isolation, protection, and
5-to-3.3V translation
Fairchild Semiconductor's new FST switch family targets bus-switch applications, such
as power-supply translation in multiprocessor and shared-memory systems. Designers can
also use the switches for isolation and protection during live insertion of notebooks to
docking stations. The FST CMOS devices come in
1-, 4-, 8-, 10-, and 24-bit configurations and have TTL-compatible inputs and a variety of
logic functions. For example, the FST6800 provides 10-bit bus switching and features
output precharge on the B-port to a selectable bias voltage that minimizes live-insertion
noise. Other products include the FST3244 and FST3245, which are pin-compatible with
standard-logic 244 and 245 functions.
The FST family is available in QSOPs, TSSOPs, SC-70s, and other packages. Devices in
the FST family have an operating range of 40 to +858C and cost $0.609 to $0.871 (1000).
--by Stephen Kempainen
Fairchild Semiconductor, South Portland, Maine.
1-888-522-5372, fax 1-972-910-8036, www.fairchildsemi.com.
Announcements from four companies help you with the difficult job of prelayout pc-board
analysis. Amp and Mentor Graphics have significantly upgraded tools for analyzing
multiboard-system signal integrity (SI), Xynetix has enhanced its virtual-prototype
backplane tool for pc-board SI analysis, and HyperLynx now offers free copies of its I/O
Buffer Information Specification (IBIS) model-development system to semiconductor vendors
if they, in turn, make available free IBIS models to the design public.
Ampredictor 3.0 from Amp is a suite of SI simulation and interface tools for prelayout
pc-board analysis. The new version of the suite has an enhanced net-topology editor,
including direct linkage to the company's Ampredictor circuit simulator. A new graphical
user interface for the Ampredictor circuit simulator provides a "virtual
oscilloscope," which simplifies measuring rise and fall times, delays, overshoot,
undershoot, and crosstalk effects. The simulator also has new math functions, including
multiplication, division, integration, and FFTs. Ampredictor also includes a 2-D field
solver for lossy transmission-line models of pc boards and the connector-noise analyzer,
which lets you select a connector; terminate its pins; and simulate critical parameters,
such as crosstalk, phase shift, and ground bounce.
You get models of Amp's own connectors with Ampredictor, but you can add your own
models of other vendors' connectors. In addition, the product provides an IBIS-to-AmpSpice
(Amp's version of Spice) converter to add drivers and receivers to your simulations. All
of the tools in Ampredictor operate from a schematiclike net-topology editor, from which
you generate an AmpSpice simulation of a complete multiboard critical net, including
drivers, boards, connectors, cables, receivers, and backplane. Ampredictor costs $8500 and
runs on a PC.
Interconnectix, which Mentor Graphics bought in August 1996, has developed a suite of
tools for timing and SI constraint-driven pc-board floorplanning, placement, and routing
tools. Mentor now introduces enhanced versions of these tools. The Interconnectix tools
use electrical-rule constraints directly--without first translating them to a
physical-rule set--to guide floorplanning and physical board-layout. New tool features
include what-if design creation and modification within the tool suite, including the
ability to add drivers, receivers, and nets for prelayout analysis. The updated
Interconnectix tools also accept minimum, maximum, and typical IBIS-model data, letting
you manually select and run corner cases during analysis. The tools have a 1-psec analysis
resolution and support for IBIS-file pin-level overshoot and undershoot.
Mentor's Interconnectix tools run on Unix platforms and interface with many third-party
pc-board-layout tools, including those from Cadence (San Jose, CA), Pads Software
(Marlborough, MA), and Zuken-Redac (Santa Clara, CA). Prices are $35,000 for Tau, a
board-level timing analyzer; $58,000 for IS_Floorplanner for hierarchical floorplanning
and analysis; $15,000 for the IS_Multiboard option to IS_Floorplanner; $35,000 for
IS_Optimizer for timing and SI- constraint-driven routing of as many as 128 nets on a pc
board; and $75,000 for IS_Synthesizer for unlimited constraint-driven board routing.
EDAnavigator 3.0, Xynetix's virtual prototyping system, has the new Net Explorer and
System Engineer tools. You use Net Explorer for defining net topologies and analyzing SI.
You can view a net, add branch points and termination resistors, and let Net Explorer
extract data and then set up and run third-party analysis tools. Net Explorer includes a
pc-board layer-stack-up editor and a constraint manager. System Engineer gives you
floorplanning, partitioning, and trade-off analysis during the rest of the design.
EDAnavigator uses an Advisor Backplane for including third-party analysis tools in a
multidomain mode, and tools are available for designing with electrical, thermal, EMC, and
board-assembly constraints. These tools provide "design advisors," which tell
you whether a design choice you make might present a problem for a postlayout design.
System Engineer includes basic advisors for board form-factor, routability, and
electrical-design decisions. Optional Xynetix Design Advisors are available at additional
cost. Also, Design Advisor interfaces are available to many well-known SI and EMC tools
from other vendors. Prices for EDAnavigator start at $10,000 for Net Explorer and $26,500
for System Engineer, and both tools are available for Unix or Windows. Other design
advisors start at $2500.
HyperLynx is making its $3000 IBIS model-development system available to
semiconductor-company model developers for free if the developers offer the IBIS models to
the design public for free. You use IBIS models in SI and EMC analysis of high-speed
pc-board and other high-speed electrical systems. The development system includes a visual
editor for creating, maintaining, and syntax-checking IBIS models; a transmission-line
simulator for testing models under realistic loading conditions; additional utilities for
accelerating model creation; and IBIS application notes. The system runs under Windows 95
and NT.
-- by Jim Lipman
Amp, Harrisburg, PA. 1-800-522-6752, fax 1-717-986-
5095, www.amp.com.
Mentor Graphics, Wilsonville, OR. 1-503-685-7000,
fax 1- 503-685-1202, www.mentorg.com.
Xynetix, Fishers, NY. 1-716-924-9303, fax
1-716-924- 4729, www.xynetix.com.
HyperLynx, Redmond, WA. 1-425-869-2320, fax 1-425-
881-1008, www.hyperlynx.com.
The digitization of communication architectures is setting the agenda for many new A/D-
and D/A-converter designs. Analog Devices' AD9260 A/D converter, for example, uses
oversampling techniques to yield 16-bit words at 2.5M words/sec with 0.004-dB passband
ripple and 85-dB of stopband attenuation for a 1.01-MHz passband. Running in 8×
oversampling mode from a 20-MHz clock, the converter yields 89-dB SNR, 98-dB THD, and
100-dB spurious-free dynamic range (SFDR) for a 100-kHz input; results for the 500 kHz
input are about 2 dB less favorable. The converter also operates in 1, 2, and 4×
decimation modes, thus saving power but with bandwidth, dynamic range, and filtering
trade-offs. The $49.95 (1000), 44-lead MQFP IC operates from a 5V supply and typically
consumes 550 mW, and you can use a 3V supply for its digital circuitry to further reduce
power consumption.
For the transmitting channel in wideband communications, in which SFDR and SINAD
performance over the entire band is critical, the AD9774 provides a 14-bit, 32M-sample/sec
D/A converter with SFDR greater than 76 dB for output signals as high as 13 MHz. This
$24.95 (1000), 44 -lead MQFP IC is a 4× interpolation filter, 4× PLL-clock
multiplier, and voltage reference. The 4× operation means that you can meet system-design
parameters with lower order, less aggressive analog reconstruction filters, yielding less
inband and phase distortion.
Exar, too, is developing converters for communications. The company's 10-bit,
40M-sample/sec XRD6440 IC includes internal track-and-hold circuitry and a reference. You
can use the device in video and high-channel-count medical-imaging applications. The $5.95
(1000), 28-lead SSOP offers a typical 73-dB SFDR and 55-dB SINAD and dissipates 260 mW
from a 5V supply.
--by Bill Schweber
Analog Devices Inc, Norwood, MA. 1-781-937-1428,
fax 1-781-821-4273, www.analog.com.
Exar Corp, Fremont, CA. 1-510-668-7000, fax
1-510-668-7017, www.exar.com.
3Com's (Santa Clara, CA) Palm-Pilot and an assortment of Windows CE palmtops may be the
new kids on the block, but Hewlett-Packard's (Palo Alto, CA) 100LX and 200LX were among
the first truly useful and successful handheld computers. HP's DOS-based palmtops are
especially popular in the engineering community. Essentially PC/XTs in your hand, they
give you access to an assortment of off-the-shelf applications, including tons of useful
shareware. You can even surf the Web and access e-mail from the road.
If you're still happy with your HP palmtop but it's beginning to show its age, consider
a midlife performance boost, courtesy of Thaddeus Computing. For $75 plus shipping and
handling, the company doubles the clock rate of the CPU, increasing the 80186's speed to
20 MHz. This speed increase may not sound like much until you consider the original 10-MHz
crystal. For $299 (HP200LX only), the company doubles the CPU speed and bumps up the
onboard DRAM to 8 Mbytes, giving you a bigger RAM disk and lots of expanded memory.
You'll notice the difference when playing PacMan and Tetris, running database searches,
calculating formulas, and graphically viewing the results. Both upgrades void the HP
factory warranty. Also, make sure that you back up your RAM disk before shipping the
palmtop.
--by Brian Dipert
Thaddeus Computing Inc, Fairfield, IA.
1-515-472-6330, fax 1-515-472-1879, orders@thaddeus.com,
www.thaddeus.com.
Texas Instruments based its new Amati asymmetric-digital-subscriber-line (ADSL) chip
set on the programmable TMS320C6x DSP core. The chip set is the fifth generation of the
discrete-multitone (DMT) modem technology from Amati--the ADSL pioneer that TI recently
acquired. The chip set works in the central-office or consumer side of ADSL and includes
digital-interface, ADSL-transceiver, codec, and line-driv-er chips.
The programmable Amati chip allows you to update DSP codes to incorporate further
enhancements to the ADSL standards, such as G.lite, which eliminates the need for a
splitter in the residential end of the ADSL. The ADSL splitter separates the voiceband
from the data-carrier band, allowing a narrow guardband between the voice and data.
However, consumers encounter problems with installing the splitters into their home
telephone wiring, requiring technicians to ensure the correct wiring. This approach is an
expensive roadblock to widespread deployment of ADSL. Splitterless ADSL is the focus of
the newly formed Universal ADSL Working Group (UAWG). UAWG will propose a simplified
version of ADSL to the ITU, which is working on the G.lite, a splitterless version of
ADSL.
The Amati ADSL chip set partitions the modem functions into four chips. This
partitioning gives the chips flexibility for both central-office and consumer modems. The
digital interface chip has two serial interfaces that make it useful in central offices in
which multiple lines increase port density. The transceiver provides enough processing
power for tasks such as DMT modulation and echo cancellation. The ADSL codec also supports
multiline configurations. The THS6002, a dual, differential line driver and receiver,
features independent power-supply connections to control noise.
The ADSL chip set evaluation kit will be available at the end of March. The THS6002
comes in a 20-pin, thermally enhanced SOIC package and sells for $5.67 (1000).
--by Stephen Kempainen
Texas Instruments, Dallas, TX. 1-800-477-8924, ext
4500, www.ti.com.
Universal ADSL Working Group, www.uawg.com.
Optical sensor provides surface-mount
noncontact switch
Mechanical switches are commonplace and reliable, but you may prefer a
small, noncontact switch to sense or control position or motion in trackball, copier,
digital-versatile-disk, scanner, and similar applications. Temic Semiconductors'
single-channel, 4×5×4-mm-high, surface-mount, single-channel TCPT1200 and dual-channel
TCUT1200 transmissive optical sensors fit the bill. Each device comprises an infrared
emitter and corresponding phototransistor detector, coaxially facing each other across a
2-mm gap with a 0.3-mm optical sensing aperture. In the dual-channel device, only
0.8 mm separate the two optical paths, letting you achieve precise measurements and
sensing. Each channel shares an emitter but has its own photodetectors, and the device has
the same size and cost--$0.65 (100,000)--as the single-channel device. Typical emitter
current is 15 mA, and detector-collector voltage (VCEO) is as high as 70V.
--by Bill Schweber
Temic Semiconductors, Santa Clara, CA.
1-408-988-8000, fax 1-408-567-8950, www.temic.com.
As CPLDs and FPGAs get larger and more complex, intellectual-property (IP) cores are
increasingly becoming the only realistic way you can fill up all that silicon and complete
your design in a timely fashion. Many engineers today report their greatest success when
using cores they obtain directly from programmable-logic vendors, although standards
groups, such as the VSI Alliance, are attempting to change this situation.
Silicon-vendor-provided IP is your only option if you want to use proprietary logic,
such as unlicensed mP cores. Unfortunately, complex logic maps
more slowly and less efficiently to to coarse-grained PLDs and FPGAs than to ASICs.
Combine a popular, high-volume CPU or DSP core in cell-based ASIC with user-programmable
logic on one chip, however, and you get a potential winner. Such a device delivers power,
performance, and board-space advantages over a multiple-chip design.
Some of today's smaller programmable logic suppliers, such as Atmel (San Jose, CA),
Lucent Technologies (Allentown, PA), Motorola, and Vantis (Sunnyvale, CA), possess both
extensive internally developed core portfolios and in-house ASIC expertise. For this
reason and others, view with skepticism claims from larger vendors that the PLD and FPGA
market is maturing, innovation is slowing, and vendor consolidation will soon inevitably
occur.
Motorola plans to offer its first CPU-plus-FPGA, the MPACF250, for sampling in the
third quarter. The company based the device on a derivative of the ColdFire Version 2
processor. The company will migrate its MPA1000 FPGA core to a 0.3-mm
process with architecture modifications to make the interconnection between ASIC and
programmable logic as fast and efficient as possible. Motorola estimates that by
implementing the ColdFire core in a diffused ASIC instead of an FPGA, it can achieve a
10-times reduction in the core's size. ASIC-based integrated peripherals include dual-port
SRAM, DMA, dual UARTs, timers and I2C, background-debugging mode, and 8-bit
programmable I/O ports.
Although prices are now unavailable, Motorola intends to sell the chip at a lower price
than the multichip alternative. The company plans to announce the availability of back-end
design software and third-party front-end EDA-tool suite support by the end of the second
quarter. Is the MPACF250 a customized programmable logic chip or a microprocessor with
on-chip FPGA? Regardless of what you call it, as the system on a chip continues to move
from marketing hype to reality, traditional product categories become increasingly
meaningless.
--by Brian Dipert
Motorola Corp, Phoenix, AZ. 1-602-732-2852, fax
1-602-732-5020, www.design-net.com.
March 16 to 19
International Verilog HDL Conference/VHDL International Users
Forum, Santa Clara, CA, offers vendor exhibits, panels, tutorials, and papers
on HDL-related topics. Topics include system-level, ASIC, and FPGA design; logic and
state-machine synthesis; formal verification; reconfigurable computing; performance
modeling; design reuse; and virtual prototyping. MP Associates, Boulder, CO.
1-303-530-4562.
March 17 to 19
FieldComms USA Symposium, Chicago, during the
National Manufacturing Week trade show, offers multitrack sessions, an editors' panel, a
vendors' panel, and tutorials on fieldbus approaches for manufacturing industries,
including process control and plant management. The symposium also addresses application
experiences, engineering practices for implementation, and network configuration and
management tools. FieldComms International, Mooresville, NC. 1-888-268-0777.
March 18 to 19
Flexible Circuits '98, San Jose, CA, illustrates
the role of flex circuitry in computer disk drives and medical ultrasound equipment. Other
conference topics include shrinking traces, microvias, testing materials and perform-ance,
and common design issues. Registration costs $395 for members of the Institute for
Interconnecting and Packaging Electronic Circuits (IPC) and $495 for nonmembers. IPC,
Northbrook, IL. 1-847-509-9700.
March 23 to 27
JavaOne, San Francisco, provides 55 technical
sessions, including Java in the real world, Java computing, and Java-industry momentum.
The event also features several keynotes by Sun Microsystems' executives. JavaOne, San
Francisco, CA. 1-650-372-7077.
March 23 to 27
Printed Circuit Board Design Conference West, Santa
Clara, CA, offers courses; a keynote address by EDN columnist Howard Johnson, PhD;
an EDA round-table discussion; and a pc-board test-drive center. Course topics cover
high-speed design, timing verification, flexible-circuit technology, and
field-programmable devices. Full-conference registration, which includes the conference
and two tutorials, costs $1295 until Feb 23, 1998, and $1395 after Feb 23, 1998. Miller
Freeman Inc, San Francisco, CA. 1-415-538-3848.
There's no "enough is enough" for A/D converters when it comes to speed or
resolution: Applications always seem to need more of both. Two recent converters
demonstrate this point. The 10-bit, 100M-sample/sec, ECL-compatible SPT7870 and similar
TTL-compatible SPT7871 ICs from Signal Processing Technologies target professional video
and high-definition TV and RF communication. Operating from ±5V supplies and scaled for
±1V analog inputs, they include an internal sample/hold circuit and voltage reference.
With a 100-MHz clock and 50-MHz sine-wave input, these converters provide effective number
of bits, SNR, and THD minimum values of 7.4, 52 dB, and 47 dBc, respectively. The
44-lead CQFP ICs cost $50 (1000).
For greater resolution but with lower speeds, Burr-Brown's 12-bit, 20M-sample/sec
ADS805 ADC extends the speed of the company's other pin-compatible 5M- and 10M-sample/sec
converters and targets applications similar to those of the SPT device. You can set the
maximum input span at as little as 2 or as high as 5V p-p. The smaller range is easier to
drive and yields better spurious performance, and the larger range yields improved
input-referred noise (0.09 LSB) and image quality. Differential nonlinearity is 0.25 LSB,
spurious-free dynamic range is 74 dB with a 9.8-MHz input, and SNR is 68 dB. Power
consumption for the $16.95 (1000), 28-lead SSOP and SOIC devices is 300 mW with a 5V
supply.
--by Bill Schweber
Signal Processing Technologies Inc, Colorado
Springs, CO. 1-719-528-2300, fax 1-719-528-270, www.spt.com.
Burr-Brown Corp, Tucson, AZ. 1-520-746-1111, fax
1-520-746-7401, www.burr-brown.com.
Triband GSM chip set achieves
efficiency by avoiding DSP core
CommQuest Technologies takes a different tack for 900-, 1800-, and 1900-MHz
multiple-band Global Sy stem for Mobile communications (GSM) phones instead of the
more-common DSP-based design. Most other GSM chip sets execute a significant amount of
numeric processing needed to implement the baseband and IF signal-processing algorithms by
using an optimized DSP at their cores. In contrast, CommQuest's Worldphone
communication-processor ASIC and adjunct three-band transceiver IC use a cluster of
optimized hardware subsystems, each of which implements specific functions such as a
matched filter, a synchronization correlator, an interleaver, a CRC checker, and a data
and control interface. You can shut down each of these functions, which operate
independently of the others, to save power when you don't need them. In addition, the
required aggregate silicon area is minimal. Unlike a DSP-based approach, this
implementation involves no Mflops parameter.
Using the 2.7V CQT2210AEB processor and CQT2230AET transceiver, which together cost
less than $25 (OEM), you can develop a triband GSM phone with a total bill-of-materials
cost of less than $70, CommQuest says. The resultant phone has a current drain of less
than 2 mA in idle mode and 90 mA in active mode, translating to eight days of standby
operation and 12 hours of talk time, using a 3.6V/1200-mAhr battery. The vendor also
provides development kits, which include an evaluation board, a reference design, protocol
software, application-layer software, test utilities, and Type Approval test plans and
procedures.
--by Bill Schweber
CommQuest Technologies Inc, Encinitas, CA.
1-760-633-1618, fax 1-760-633-1677, www.cqt.com. |
