EDN Access PLEASE NOTE:
FIGURES WILL LINK
TO A PDF FILE.

March 13, 1998


CCDs inspire ADCs to embrace signal processing

Bill Schweber, Technical Editor

You need more than just a good A/D converter to effectively interface with a CCD image sensor. Newer converter architectures include signal-processing circuitry that simplifies the task while improving overall performance.

The CCD image sensor is a ubiquitous photon-to-current transducer for applications ranging from relatively slow scanners to high-end, still and full-motion cameras. As with most real-world transducers, under this simple statement is a complex interfacing challenge.

Although you can easily connect your system to a single-element CCD, this simple sensor would not have much practical use except in limited circumstances. As the CCD elements expand into a linear array, your interface challenge becomes more complex, and when you graduate to a 2-D CCD array, you have a complex design challenge. Among the unavoidable difficulties are pixel-to-pixel sensitivities, the need for higher scanning rates, per-pixel time-varying offset and noise, dynamic-range considerations, sensor saturation, and the need to maintain monochrome or color fidelity across the unevenly illuminated subject and CCD array.

06DF11To meet the challenges, A/D-converter manufacturers have transformed basic converters into application-specific devices with functional blocks that complement the unique characteristics of CCDs and overcome many of their shortcomings (Figure 1). In addition, they are providing specifications that allow you to more easily determine the actual imaging perform-ance you can achieve in your system.

CCD A/D converters must meet the customary speed and resolution criteria. In contrast to a conventional unipolar or symmetrical bipolar range of a sensor, the CCD yields an information-bearing signal of several volts with a dc offset of 7 to 9V. You need to use a capacitor to ac-couple the CCD signal, but this approach destroys important black-level information. For this reason, most CCD-specific front ends include dc-clamping to restore the black-level reference.

You can relatively easily specify the first parameter, speed. You determine the number of pixels you have and how quickly you need to refresh the image and then do the standard calculation to yield the number of samples per second the converter needs to sustain. If you use a linear array for scanning an image, you have to work in the number of lines per image area; for a 2-D array, the number of pixels per image is self-evident. Although the requisite conversion rate can range from a few hundred kilosamples per second to megasamples per second, scanners and still cameras usually have conversions of 1 to 5M samples/sec, whereas full-motion video cameras convert at 10 to 20M samples/sec or even higher. Watch out for the "3×" rate factor between A/D converters for monochrome vs RGB CCDs: A single converter that handles all three inputs has an effective pixel-conversion rate only one-third that of a single-input converter.

Resolution, however, is much more difficult to specify than sampling rate, because the number of bits the converter needs depends on many difficult-to-quantify factors, such as perceived appearance and image quality, in addition to conventional parameters, such as differential nonlinearity (DNL) and integral nonlinearity (INL).

A basic low-end scanner for line art may be satisfied with an 8-bit converter, but many applications need at least 10 or even 12 bits. Even so, getting the most useful and representative signal from those 10 to 12 bits requires that you understand the nature of your target image as well as what types of image distortions are acceptable (see box "Can we resolve these issues?"). Scanners are available with 24-, 30-, or even 36-bit resolution. This description is just shorthand for a three-color (RGB) converter subsystem with 8, 10, or 12 bits/color, respectively, for red, green, and blue.

Resolution is just part of the design perspective. CCDs, as with most analog sensor-based systems, require the most attention at the lower end of their signal ranges, corresponding to low-light conditions. Here, you need to consider dark current, offsets, readout noise, A/D front-end noise, and similar imperfections that reduce SNR and make assumed dynamic-range numbers too optimistic. A standard trade-off also exists between noise, corresponding to dynamic range, and speed, corresponding to bandwidth.

Not surprisingly, much sophisticated CCD-A/D converter design-in activity now is in very-high-resolution devices. Converters with 14, 16, and even 18 bits target critical instrumentationlike applications, such as scanning photos, astronomy, spectroscopy, and micro-scopy. In these applications, video fidelity--roughly analogous to audio fidelity--is critical, and subtle intensity and color differences convey considerable information to the user. Also, small distortions or artifacts that occur may lead a user to incorrect conclusions when employing these converters in these applications. These higher resolution converters operate at lower speeds than their lower resolution siblings, but speed is usually not a primary consideration in these applications.

At these higher resolutions, an integrated CCD-specific A/D-converter subsystem may be unavailable, and those that are available force you to make some undesirable performance trade-offs. You may have to build the A/D-conversion subsystem from functional building blocks with a high-performance A/D converter as its core.

The CCD is one of the most fickle sensors to achieve mass-market acceptance. Even if your A/D subsystem--whether integrated or discrete--is near-perfect, you still need to accept that the signal that the CCD develops is imperfect. CCDs inherently produce a time-varying noise, gain, and offset in each cell, and your interface system must cancel these error sources in any application requiring moderate to high accuracy. Offset errors appear as variations in black level, whereas gain, or "shading," error appears as variations in white level. Fortunately, a complex but feasible technique of correlated double sampling (CDS) can significantly reduce these offset errors (see box "CDS overcomes sensor deficiencies").

Factors outside the CCD itself add to the difficulty. For example, uneven lighting across the image is unavoidable, and this fact compromises effective use of the converter's available bits. The CCD therefore requires extra resolution to maintain the desired dynamic-range goals because these factors shift the image-intensity signal within the available range.

Most systems have a pixel-by-pixel or line-by-line calibration mode to correct for sources of error, such as pixel-response nonuniformity (PRNU), including scanning a fully illuminated white sheet for establishing a full-scale reference across the image. The pixel-by-pixel mode is more complex and more accurate than the line-by-line approach. Another technique you may use is to scan a checkerboard pattern, which exercises the slewing capability and large-signal bandwidth of the converter. Because adjacent dark and bright areas are common, the checkerboard-pattern scan is a realistic scenario.

Note that many vendors specify frequency-domain specifications, such as THD, for their CCD ADCs. There's nothing inherently wrong with this approach, but some vendors feel that time-domain data-acquisition specifications, such as linearity, more suitably characterize electronic image capture. You should ask for and look at both frequency- and time-domain specifications in the context of your application.

Unless you have a carefully controlled application, the CCD and analog front end may endure overload light conditions. Although most CCD front ends include a programmable- gain amplifier (PGA) to allow you to implement signal scaling and prevent saturation of the A/D converter, this scaling is sometimes unsuccessful or too slow. You need to look at recovery time for the converter and associated circuitry if overload and subsequent lost video signals are concerns. Also, check what overvoltage criteria your device is using. A 10% overvoltage is most common, but some vendors also specify recovery times for 20% overvoltage.

Unlike temperature probes, CCDs are not simple one-point sensors, and they have more idiosyncrasies than just about any other sensor you encounter. However, CCDs and simpler, low-level sensors do share one mixed-signal feature: the importance of layout and grounding. These devices' high-speed digital clocks and circuitry reside near low-level analog signals. Follow the manufacturer's suggested layout guidelines. If the data sheet omits these guidelines, insist on seeing a layout from the manufacturer's lab evaluation board, and watch the analog and digital ground connections of the CCD IC and your system.

Even though the CCD interface with an A/D-converter IC usually has separate analog and digital grounds, these grounds are for circuitry within the IC. Don't connect these two grounds to the relatively noisy system digital ground, which would allow digital system noise to couple to the IC's analog-signal sections. You may need to decouple the digital supply to the analog ground plane and connect the digital grounds of the IC to the analog ground; in some cases, using a separate digital-supply subsystem for the CCD ADC is a good idea. Again, check with the vendor for a sample layout that works.

Your design may need timing flexibility, as well. CCDs have multiphase clocks, and the A/D subsystem by its nature samples the CCD signal to perform the conversion. Depending on the match between the CCD and the A/D subsystem, the CCD clocks may need some flexibility in timing when sampling occurs. Some CCD processors allow you to adjust the sampling time and other timing parameters via digital codes. Many CCD ADCs provide all needed clocks, derived from a master clock signal, to the CCD; these clocks may also need some provision for adjustment.

About a dozen vendors offer A/D converters and subsystems that work well in CCD applications or are expressly designed for these sensors. First, the good news: Among the many offerings, you'll probably find one that has the combination of trade-offs that meets your needs. Now, the bad news: These components are only broadly comparable with each other and differ in their functions, package size and pinouts, architecture, and implementations, as well as detailed performance specifications.

For example, some ADCs use digitally controlled PGAs, whereas others use analog-controlled PGAs. Digital control is more processor-friendly, but analog control is continuous over its range, and you can more easily use it in an autonomous closed-loop configuration.

If your end product is a basic scanner, you might consider Maxim's 8-bit MAX1101 digitizer, which samples as fast as 1M sample/ sec. The device includes an input multiplexer with two auxiliary, non-CCD channels in addition to the primary CCD input, a 6-bit, digitally controlled PGA with gain range from ­2 to ­10, and clamp circuitry for black-level correction or CDS operation.

06DF12You can use one of Analog Devices' conventional fast or high-resolution A/D converters, but the company's AD9802 suits applications that need resolution and sampling rates covering a variety of CCDs and their applications (Figure 2). The signal-processor IC offers a 10-bit, 18M-sample/sec core with DNL lower than ±0.5 LSB, along with a PGA with analog linear-in-decibel gain control from 0 to 31.5 dB. It also includes CDS and internal clamping circuitry to restore black levels.

Among the members of Exar's CCD family, the triple-10-bit XRD4433 ADC offers 3M-sample/sec simultaneous sampling. Each channel has independent control for positive and negative DACs, which you use for per-channel offset and gain correction in place of CDS. The device also includes an internal clamp that allows for dc restoration of the analog-input black level.

A pair of CCD interfaces from Texas Instruments illustrates how vendors are tailoring their devices to specific applications that require different amounts of resolution and presampling and postsampling pixel manipulation. The company's 12-bit, 6M-sample/sec TLC8044 has an input RGB multiplexer; it offers both DAC-referenced and CDS modes, per-pixel offset and shading compensation, digital-dc restoration, and global gain and offset ad-justment for each color channel. In contrast, the company's 10-bit TLC-8144 operates at the same sampling rate, has an input multiplexer, has CDS but not DAC sampling, and includes digital postprocessing to compensate for variance in offset and luminance.

In addition to basic A/D converters that you can use as front ends for CCD imaging, Burr-Brown offers the more complete VSP2000 CCD signal processor. This 10-bit, 18M-sample/sec converter includes CDS, black-level clamping for accurate black-level reference, and an analog-controlled PGA with 34 dB of gain range. SNR is 55 dB, referred to full-scale input.

Applications requiring higher resolutions further limit your choices and may require you to separate the A/D converter from the associated CCD signal-processing circuitry. Datel offers A/D converters plus a pair of pin-compatible CDS circuits commensurate with 10- to 14-bit applications. The CDS-1401 for 1.25 million-pixel/sec converters and CDS-1402 for 5 million-pixel/sec converters have gain-matched S/H amplifiers; the CDS-1401 operates with ±10V input and output signals, and the CDS-1402 operates with ±2.5 signals. Both devices, which precede the A/D converter, include independent offset adjustments for each S/H amplifier, as well as control lines for triggering their A/D converters.

The standard integration path of adding more functions on a chip holds true for A/D front ends for CCDs. These complete CCD systems can cut board space and component count. They can also eliminate one of the messiest issues of dealing with CCDs and their related circuitry: the fact that the CCD, the converter and its optional multiplexers and correction circuitry, and the digital  interface must share management of the CCD's fairly complex timing patterns. These highly integrated ICs can also embed sophisticated gain and offset adjustments that provide corrections for various CCD and image flaws to provide better data fidelity. However, although the IC itself can automatically correct some flaws, some require more intervention and work by your system processor and code. Consider ease of use, completeness, cost, flexibility, and optimization for a specific CCD.

National's LM9812 represents the sophistication that CCD processors offer. National built this three-channel device around a 10-bit, 6M-sample/sec A/D converter, but that converter is only one of the many blocks within. Each input has independent PGAs for coarse balance among the red, green, and blue colors, as well as static-offset DACs to correct for color channel offsets. The company supplemented the device's circuitry with correction circuitry, which compensates for PRNU and illumination variations on a per-pixel basis. You can also adjust sampling points in 25-nsec increments to achieve the best performance.

06DF13CCD signal-processor ICs are ex-panding their roles to include the formatting of output data and standards compliance. For higher speeds, Motorola offers its MCM10005 digital image-capture engine, which supports conversions from 10 to 24M samples/ sec with as much as 10-bit resolution (Figure 3). In addition to CDS circuitry and digital adjustments for various compensation functions, this IC in-cludes a user-programmable 10- to 8-bit look-up table, so you can map the higher resolution data to a low-resolution result. This approach lets you reduce the video memory and data-processing requirements in your system with minimal effect on color fidelity. The device also includes a preprogrammed 10- to 8-bit look-up table with gamma-corrected values that comply with ITU-RBT.601 (CCIR 601) requirements.

06DF14Cirrus Logic's Crystal Semiconductor Division offers a two-chip set comprising the CS7615 analog front-end processor and the CS7665 digital video processor (Figure 4). The company based the chip set on a 10-bit converter. You can use the same chip set to build small-format Common Interface Format (CIF)-compliant, 358×288-pixel; medium-format, ITU-601, 720× 480- or ×576-pixel; and large-format, 1000×1000-pixel systems. The I2C-bus-controlled pair includes CDS and has a multisynchronus timing generator that makes your system compatible with most CCDs. You can program the 38-dB AGC circuit to work on the full screen or on one-fourth or one-sixteenth of the screen to optimize image quality. Other features include gamma correction, red/blue saturation control, and digital antialiasing functions. The output of the chip set is YCrCb (luminance/chrominance)-formatted digital video.

Some applications need no flexible, universal front end but instead need to work with only one vendor's CCD device, or some applications have unique requirements that an integrated design cannot easily meet. In these cases, you may be satisfied with a more focused or easier-to-use configuration. Consider building your own carefully tailored CCD A/D subsystem using separate converters, multiplexers, and even CDS circuitry. For example, you can use a converter such as the LTC1415 from Linear Technology, which the company built around a converter that requires just 55 mW, as the core of a 12-bit, 1.25M-sample/sec system.

The devices in Table 1 are just a small sampling of your choices. You can consider both CCD-specific ADCs and more highly integrated devices, and many choices are available. In addition, each vendor's portfolio includes devices with a range of functions and features beyond simple extensions of resolution and speed.


References

  1. Gallant, John, "CCDs let you design vision into applications," EDN, Oct 12, 1995, pg 87.

  2. Kempainen, Stephen, "CMOS image sensors: eclipsing CCDs in visual information?," EDN, Oct 9, 1997, pg 101.

  3. Dipert, Brian, "Digital photography clicks," EDN, Dec 18, 1997, pg 50.


Acknowledgments

Thanks to Erik Barnes of Analog Devices Inc, Patrick Kirk of Burr-Brown Corp, Chuck Sabolis of Datel Inc, Bill Levinson of Exar Corp, Todd Nelson of Linear Technology Corp, Tanja Hofner of Maxim Integrated Products, and Fred Hamilton of National Semiconductor Corp for their insight into CCD-A/D converter issues.


06df1gl
  • CCD-ADC interfaces range from basic converters to complete signal-processing ICs.

  • There's little commonality in functions and implementation among CCD interfaces, so choose carefully.

  • An ADC interface for CCDs can be universal and complex, but you may need just a single-purpose, targeted design.

Can we resolve these issues?

Although you may want more bits--yielding higher resolution--for your design, you pay a premium for those bits in higher component cost, increased power consumption, and slower conversions. Before you decide how many bits of A/D-converter resolution you need, you need to understand what these bits do for you and what kinds of errors should concern you.

Much of the resolution issue concerns the nature of images and the way that the eye perceives them (Reference A). The eye has a linearity perception of about 1%, corresponding to 6 to 7 bits of performance. Yet, an ADC for imaging usually needs more resolution than just 6 or 7 bits because the eye is relatively good at detecting edges or discontinuities in intensity, and, by definition, an A/D converter produces such discontinuities by its function of quantization. The eye can more readily detect incorrectly placed, missing, and "false" edges--nonexistent edges that seem apparent--than it can slight visual-intensity errors, roughly equivalent to audio THD.

Although some scanner manufacturers tout their devices as 30- or even 36-bit systems, corresponding to 3×10 or 3×12 bits, respectively, most application software uses 24-bit (3×8-bit) files. These extra bits are not just advertising: They allow the scanner to perform gamma correction--a type of companding for image signals--in the digital domain.

06DF1B2AFrame correction involves the long-recognized phenomenon that the eye is more sensitive to differences among darker tones than to those among lighter tones, whereas the output of a CCD is fairly linear with respect to light intensity. You can compand by curving the linear analog transfer function in the signal-processing path (Figure A).

06DF1B2BHowever, if you compand the results of an A/D conversion, you get missing output codes in the region that you need the greatest resolution, because you're attempting to "expand" on information that isn't there (Figure B). By using a 10-bit converter and digitally companding, your design still retains the desired signal resolution after expanding the signal. The virtue of using a 10-bit conversion and then companding is that doing so puts the converter's resolution response where your design needs it. This approach lets you use an 8-bit, nonlinear scale result instead of a 10-bit linear one, saving memory and system bandwidth.

Differential nonlinearity (DNL) is the most important specification for CCD ADCs, because DNL error results in edge distortion. In an ideal converter, the step width or analog increment of each conversion value is the same, and the DNL is zero. Such an ideal converter would translate increasing light intensity into digital values that an ideal D/A converter could reconvert to resemble perfectly stepped wedges of increasing intensity. This process is analogous to quantifying a communications converter by reconstructing the digital values of a sine wave with a perfect DAC and observing the quality of the sine wave.

If the DNL is not zero, each step has a different width. This imperfection affects intensity fidelity and causes improper gradation of the image scale with local imperfections. In addition, even small DNL values can add to a significant error in integral linearity, which defines the linearity of the overall scale. Such integral nonlinearity (INL) corrupts the entire image scale with a gradual nonlinearity. The eye is generally less sensitive to this type of error than to DNL-induced edge problems. However, if your system implements color-processing algorithms, INL results in color artifacts that may cause deceptive results.

Because INL errors represent a visual averaging of DNL errors, DNL and INL specifications interrelate. However, the exact placement of various DNL errors, even if they have the same set of values, can produce different INL effects. For example, a 1-LSB adjacent to a ­1-LSB DNL error at one point in the transfer function would produce no INL but would produce a noticeable edge in the continuity of shading.

Because most ADCs for CCDs have DNL of 0.25 to 0.5 LSB, make sure that you are using worst-case, not typical, specifications. DNL greater than 0.5 LSB usually creates objectionable artifacts, except in applications targeting line presence or absence. INL values are usually 1 to 2 LSB.

Your application may need to adhere to video standards of CCD pixel-array dimensions or interface formats. Some advanced CCD-ADC subsystems are also data processors, which produce a variety of output formats, such as CCIR 601, and a variety of color-space formats, such as RGB and YCrCb.


Reference

  1. "Inside CCD document scanners," National Semiconductor Corp.

CDS overcomes sensor deficiencies

Three major factors affect a CCD's output. First, a residual charge occurs because the pixel previous to the one being sensed does not have time to complete a full discharge of stored charge. Also, the parasitic capacitances of the FET switch in the CCD suffer from charge injection. Third, "kTC" (for Boltzman's constant, temperature, and capacitance) noise occurs, which is proportional to the square root of the product of Boltzman's constant, ambient temperature in degrees Kelvin, and capacitance.

One technique manufacturers use to handle such errors is to configure the circuit to inject a compensating offset (Reference A). Correcting for the offset with just a fixed compensation doesn't work, because the offset varies from pixel to pixel and with time. Early CCD systems used an updatable configuration of multiplying DACs, which corrected the signal by adjusting and scaling the CCD signal output and error-reference signals, but this technique poses severe challenges in DAC settling time, A/D-conversion times, and overall CCD dynamics. You can successfully use this technique in integrated devices, however, because it imposes no significant additional cost.

06DF1B3AIn contrast to DAC-based correction, the converter in correlated double sampling (CDS) takes two successive samples from the CCD pixel. "Correlated" means that the converter samples in as short a time differential as possible (Figure A). One sample is of the CCD error voltage; the other, of the actual CCD output. A separate S/H circuit holds each of these analog samples. After the converter acquires both samples, the outputs of the S/H amplifiers go to a difference amplifier, which subtracts the pixel error voltage from the second, desired-signal reading plus error. This procedure not only removes nearly all of the pixel-to-pixel offset errors, but also simplifies interconnection because it lets you ac-couple the input so that a 3 or 5V ADC can digitize a signal of approximately 1V on an offset of 7 to 10V.

In addition, CDS lowers the observed noise floor of the CCD system because the technique minimizes the pixels' noiselike random offset. This approach, in turn, increases the system's dynamic range and SNR. Further, the difference amplifier can provide typical gain of approximately 3 dB to further enhance SNR in the analog-processing chain before the A/D converter, and this process is almost always beneficial to data-acquisition performance. Some more highly integrated CCD signal processors use both CDS and DACs to compensate for different aspects of the CCD-performance shortfalls.


Reference

  1. Sabolis, Chuck, "Seeing is believing," Datel Inc, Application Note AN-6.

Manufacturers of ADCs for CCDs

When you contact any of the following manufacturers, please let them know you read about their products on EDN's Website.

Analog Devices Inc
Norwood, MA
1-781-937-1428
fax 1-781-821-4273
www.analog.com
Analogic Corp
Peabody, MA
1-978-977-3000
fax 1-978-531-7356
www.analogic.com
Burr-Brown Corp
Tucson, AZ
1-520-746-1111
fax 1-520-746-7401
www.burr-brown.com
Cirrus Logic/Crystal
Austin, TX
1-512-445-7222
fax 1-512-445-7581
www.cirrus.com
Datel Inc
Mansfield, MA
1-508-339-3000
fax 1-508-339-6356
www.datel.com
Exar Corp
Fremont, CA
1-510-668-7000
fax 1-510-668-7001
www.exar.com
Linear Technology Corp
Milpitas, CA
1-408-432-1900
fax 1-408-434-0507
www.linear-tech.com
Maxim Integrated Products
Sunnyvale, CA
1-408-737-7600
fax 1-408-737-7194
www.maxim-ic.com
Motorola Semiconductor
Phoenix, AZ
1-303-675-2140
www.mot.com/ADC
National Semiconductor Corp
Santa Clara, CA
1-800-272-9959
www.national.com
Philips Semiconductors
Sunnyvale, CA
1-800-447-1500
www.semiconductors.philips.com
Texas Instruments Inc
Dallas, TX
1-800-477-8924, ext 4500
www.ti.com

XXSCHWEB
Bill Schweber, Technical Editor

You can reach Technical Editor Bill Schweber at 1-617-558-4484, fax 1-617-558-4470, bill.schweber@cahners.com.


| EDN Access | Feedback | Table of Contents |


Copyright © 1997 EDN Magazine, EDN Access. EDN is a registered trademark of Reed Properties Inc, used under license. EDN is published by Cahners Publishing Company, a unit of Reed Elsevier Inc.