April 9, 1998

WHAT'S HOT IN THE DESIGN COMMUNITY

$10 floating-point DSP approaches fixed-point price

Analog Devices' new $10 (100,000) ADSP-21065L floating-point DSP approaches fixed-point-device prices, which can be less than $5. The low price point should attract system designers, most of whom prefer to use a floating-point rather than a fixed-point DSP for the floating-point devices' better performance, easier-to-write software, more precise results, and wider availability of application libraries.

The 21065L has the same basic core as every other SHARC, but Analog Devices made some trade-offs to hit the low price. First, with 544 kbits of dual-ported SRAM, this DSP has a little more than half the memory of the 21061. Unlike other SHARC family members, which target multiprocessor applications, the 21065L lacks link ports for distributed arbitration. This DSP still has a cluster-interface bus that allows it to transfer data as fast as 120 Mbytes/sec between other devices. Furthermore, because the 21065 has an optimized core design and a 60-MHz clock speed, the device runs 30% faster than other SHARC devices claims the vendor.

The ADSP-21065L has eight channels of I²S that supports as many as 7.1 channels of surround sound, two time-domain-multiplexed serial ports that interface directly to T1 and E1 lines, and an I/O processor that supports as many as 10 DMA channels and enables as many as four accesses per cycle. It also has a 32-bit synchronous DRAM interface that operates at 60 MHz.

--by Markus Levy

Analog Devices, Norwood, MA. 1-781-329-4700, www.analog.com.

Voice storage gets flashy

With the ISD4000 chip family, Information Storage Devices (ISD) moves its single-chip audio record/playback devices to lower cost, denser flash technology. Operating at 3.3V, ISD's chips offer 2- to 16-minute recording times and 4- to 8-kHz sampling frequencies. Backward compatibility with the previous generation EEPROM-based ISD33000 devices simplifies your design-migration efforts. ISD4000 chips retain the company's 8-bit/256-level per-cell storage approach, and flash memory's more accurate and reliable charge placement improves SNR by as much as 6 dB, according to the company.

More than a simple memory array, ISD's ChipCorder components contain analog input amplifiers for boosting microphone signals and output amplifiers for directly driving speakers. Five-pole antialiasing and smoothing filters improve audio quality; internal clocks, mute and power-conditioning circuits, and SPI-based logic control minimize external component count. The ISD4000 devices tap directly into the analog input and output stages of a cellular phone or advanced pager and offer a straightforward means of retrieving messages without the cost and hassle of calling a voice-mail system. However, their internal A/D and D/A circuits may be redundant with those already in a digital-protocol phone or pager.

Packaging options for the ISD4000 series include TSOP and mBGA. Maximum read, write, and standby-current consumption specs are 30 mA, 40 mA, and 10 mA, respectively. Both the ISD4002 and 4003 are now available for sampling, and the 4004 should appear in the third quarter. ISD4002 prices range from $5.70 to $8.15 (10,000), depending on package, sampling frequency, and operating-temperature range. The ISD4003 sells for $7.95 to $11.30 (10,000).

--by Brian Dipert

Information Storage Devices, San Jose, CA. 1-408-369-2400, fax 1-408-369-2422, www.isd.com.

New tool adds horsepower to datapath design

Newcomer Arcadia Design Systems has introduced Mustang, an EDA tool to help you with physical datapath implementation. You use the Mustang datapath placement engine before your chip place-and-route tool to more efficiently lay out datapath cells. Using the tool can result in a faster datapath block with less silicon area.

Arcadia designed Mustang as a complement to popular place-and-route engines. The tool accepts either Verilog or EDIF input along with standard Cadence (www.cadence.com) or Avant! (www.avanticorp.com) cell libraries. Mustang's output file is a preplaced datapath that provides placement information to the place-and-route tool. By providing placement information instead of treating the datapath as a "black box," Mustang lets the peace-and-route tool route over and through the datapath block where possible, minimizing wasted silicon area. Arcadia also claims that Mustang provides as much as a 50% reduction in datapath wire length.

Mustang lets you create datapath placements with horizontal or vertical buses. The choice of bus direction gives you more flexibility when designing the datapath into a top-level chip topology. During compilation, you can configure your datapath design with bit-width, interleaving, and folding options. These options let you try what-if scenarios for optimizing datapath performance. The current version of Mustang also recognizes Wallace Trees, which tend to have triangular rather than rectangular shapes and efficiently creates these types of datapaths.

Running on Unix-based platforms, Mustang will be available in May for a starting price of $85,000. The first version of the tool will work with Cadence Silicon Ensemble, Gate Ensemble, and Cell3 and with Avant! Aquarius and Aquarius XO place-and-route tools.

--by Jim Lipman

Arcadia Design Systems, Santa Clara, CA. 1-408-235-7668, fax 1-408-235-7688, www.arcady.com.

Never say never to smaller linear ICs

Just when you thought it was safe to set the magnification ratio of your glasses, basic linear functions are shrinking again. National Semiconductor's LMV series uses a five-lead version of the SC70 package (2×2×1 mm)--in use in three-lead versions for discrete transistors--to create the smallest single-channel op amp available, about half the size of the SOT23-5. The LMV321 op amp has a 1-MHz gain bandwidth product and 1V/µsec slew rate, swinging to within 10 mV of its positive rail and 65 mV of its negative rail with a 10-kilohms load. The $0.27 (1000) device operates from 2.7 to 5V supplies and draws 130-µA quiescent current.

--by Bill Schweber

National Semiconductor Corp, Santa Clara, CA. 1-408- 721-5000, www.national.com.

Scope without a display targets embedded systems

LeCroy's LSA1000 Signalyst does almost everything a high-performance two-channel DSO does. But without help, the unit can't perform the key scope function--displaying waveforms on its screen; the 31/2-in.-high unit has no screen. The unit's intended use is in embedded systems that already have a display. Developers often have to struggle to keep such systems from expanding beyond a single equipment rack. LeCroy's color DSOs occupy 101/2 in. In many applications, the 7 in. that the Signalyst saves are crucial.

The unit competes against VXI-bus waveform digitizers, but LeCroy points out that in many applications the Signalyst is more economical, be-cause it requires no VXI card cage or slot-zero controller. Moreover, the Signalyst has deeper acquisition memory and a more powerful CPU. Competitors offer memories no deeper than 15 kbytes/channel; you can equip the Signalyst with as much as 2 Mbytes/ channel. In addition, unlike competitive units, the Signalyst can allocate all of its memory to one channel. The two channels have 750-MHz bandwidth and a maximum sampling rate of 2G samples/sec in single-channel mode.

The unit's CPU is the same 96-MHz PowerPC 603e (with as much as 64 Mbytes of processor memory) that LeCroy's LC series DSOs use. Therefore, the unit runs the analysis packages that the scopes run. This processing capability can reduce the amount of data that must travel to the host CPU via the 100BaseT Ethernet interface. LeCroy furnishes a LabWindows/CVI driver and offers software that provides ActiveX support under Windows 95 and NT. The unit's base price is $14,950.

--by Dan Strassberg

LeCroy Corp, Chestnut Ridge, NY, 1-800-553-2769, fax 1-914-578-5985, signalysis@lecroy.com, www.lecroy.com.

Wireless keyboard integrates universal remote control

The BeamerPlus wireless keyboard from Sejin America integrates a Windows 95 keyboard, a high-resolution trackball, and a universal remote control. The keyboard has 86 full-sized character keys; an embedded numerical keypad; inverted-T arrow keys; and large shift, enter, back-space, and space-bar keys. The keys use full-travel membrane switches to provide a quiet tactile feel.

"Hot buttons" dedicated to the universal remote control include power, channel, volume, mute, play, stop, reverse, forward, record, pause, TV/VCR, menu, select, sleep, and display. Many of the keyboard keys also provide remote-control features, such as navigate, guide, TV-PC, go back, PIP, swap, freeze, input, power, channel control, and size. In addition, buttons for PC/Internet, TV, cable/satellite, VCR, CD, and other entertainment systems illuminate when a user presses them.

ID switches controlling the wireless-infrared codes allow the use of as many as 16 keyboards in the same room without interference. Three wide-angle LEDs provide a 220° range of operation. A three-level output-power switch allows you to optimize the keyboard's range vs battery life for specific applications. The suggested retail price for the keyboard is $219.

--by Bill Travis

Sejin America, Santa Clara, CA. 1-408-980-7550, fax 1-408-980-7562, www.sejin.com.

Fast Ethernet switch chip trunks for 800-Mbps connections

Allayer Technologies' eight-port AL100 Fast Ethernet switch chip gangs, or trunks, multiple ports for connections to servers or to another switch. The AL100 trunks as many as four ports to appear as one 800-Mbps Ethernet connection. The switch includes digital logic for eight full-duplex ports to switch on-chip. Alternatively, you can create 16-, 24-, and 32-port switches from cascading as many as four chips with the proprietary Ring of Switches (RoX) expansion bus. The optional AL300 management engine adds Simple Network Management Protocol (SMNP) and remote-monitoring (RMON) capabilities to the switch design. In addition, the AL100 reduces system cost by using synchronous graphics RAM for buffering data.

Trunking allows the switch to achieve higher bandwidths without expensive Gigabit Ethernet equipment. Trunking treats multiple physical links as one logical link. The links within the trunk need to employ load balancing for maximum efficiency and maintaining packet order. The AL100 balances loads by assigning a source port to a link in the trunk or by using the media-access-controller source address to forward packets to trunk links.

The RoX bus connects multiple AL100 switch chips and the AL300 for network management. An external connector allows the RoX bus to connect stackable eight- or 16-port switches for network expansion to 32 ports. The bus uses a 32-bit datapath plus 11 bits for address and control and runs at 66 MHz for 2 Gbps in both the upstream and the downstream directions.

The AL300 management engine uses the RoX bus to collect network-management information from the AL100 devices. The AL300 provides the management-information-base (MIB) statistics to support both SNMP and RMON for as many as 32 Fast Ethernet ports and provides Spanning Tree support.

Samples of the AL100 network switch will be available this month in 352-pin BGA packages for $100 (1000). The AL300 management chip will be available in July in a 240-pin PQFP for $60 (1000).

--by Stephen Kempainen

Allayer Technologies, San Jose, CA. 1-408-573-8880, fax 1-408-573-8928, www.allayer.com.

Smaller technology creates larger system-on-chip capability

LSI Logic's G12 process for high-density-chip design lowers the cell-based-design bar to 0.18-µm drawn CMOS transistor-gate length. Shorter gates equal faster device switching. G12 offers an effective transistor-gate length of 0.13 µm, meaning that the transistors electrically behave as if they had gate lengths of this size. Chips fabricated with the G12 process offer as many as 26 million usable logic gates on a 20×20-mm chip, a density of 65,000 gates/sq mm. This density is about three times that of LSI's previous 0.25-µm G11 process. LSI projects typical design densities of 500,000 to 8 million gates.

Smaller transistors do not mean smaller chips; metal-interconnect-line pitch is the main determinant of chip size. G12's pitch for fully contacted metal (two adjacent metal lines with contacts next to each other) measures a mere 0.63 µm. The process has six layers of interconnect metal: one for local-cell connection, four for global routing, and one for flip-chip packaging. You can make the top two metal-routing layers thicker and wider to reduce parasitics and their associated delays. G12 employs aluminum metallization; LSI has been investigating copper interconnect but finds the technology too immature for the G12 process.

Two types of transistors for G12 target low power and high speed. The low-power transistor dissipates 7.1 nW/MHz/gate at 1V. The high-performance devices allow on-chip clocking as fast as 600 MHz at 1.8V. You can use both transistor types on one chip. LSI has optimized the process for 1 and 1.8V operation with 2.5- and 3.3V-tolerant I/Os. Complementing digital-logic design, you can embed RF modules on a chip fabricated with G12 technology, because the process also provides transistors with an f_T higher than 70 GHz and the ability to design flat inductors. LSI also offers SRAM and ROM blocks, created by memory-compiler software, along with mixed-signal cores.

To handle G12-based system-on-chip designs, LSI recently announced flip-chip packages measuring 45 mm/side with as many as 1732 pins, including 1024 I/O pins. These packages have split power and ground regions for mixed-voltage operation. The company will offer prototype designs using G12 technology in the fourth quarter. Initial chip production will begin in the second quarter of 1999. Prices depend on design complexity and chip quantity.

--by Jim Lipman

LSI Logic, Milpitas, CA. 1-800-574-4286, fax 1-408-433-8989, www.lsilogic.com.

Color LCDs brighten display applications

Cockpit displays, tollbooths, vehicle-information systems, point-of-sale terminals, and other outdoor applications require extremely bright, sunlight-readable displays. Computer Dynamics' new Ultra-HiBrite line of enhanced brightness color thin-film-transistor LCDs fit the bill with luminance ranging from 400 to more than 1600 nits. The flat-panel assemblies are available in 6.4-, 8.4-, 10.4-, 12.1-, 13.8-, and 15.1-in. sizes. Ultra-HiBrite panels come in XGA, VGA, and SVGA resolutions and with as many as 16.7 million colors. The panels offer either direct backlighting or a unique edge-lighting module in which microprisms, specialized reflectors, polarizers, and diffusers channel light evenly across the panel. The edge-lighting technique offers better thermal performance than direct backlighting and only slightly increases the display's thickness. Ultra-HiBrite panels include dimming inverters that yield a 250-to-1 dimming ratio for comfortable nighttime viewing and for increasing the panel's backlight life. A 10.4-in. Ultra-HiBrite display costs less than $1000, including the backlight inverter.

--by Warren Webb

Computer Dynamics, Greenville, SC. 1-864-627-8800, fax 1-864-675-0106, www.cdynamics.com.

SmartMedia density, connectivity options expand

Toshiba addresses density limitations in the SmartMedia data-storage cards by modifying the NAND flash memory inside. Previously, the cards could contain no more than one chip, putting an upper limit on their size. Toshiba combined a revamping of each flash memory's decoding circuitry with using stacked-die packaging and can now squeeze two chips into the same card form factor. For example, maximum card densities using 64-Mbit NAND flash memory are now 16 Mbytes vs the previous 8 Mbytes. The dual-die, 16-Mbyte card costs $35 and also has a lower cost per megabyte than its single-die, 8-Mbyte equivalent, which costs $21 (50,000).

Toshiba is also increasing your data-interchange options between systems with FlashPath floppy-disk adapters. A number of companies offer PCMCIA converters with integrated ATA controllers, which work well as long as you use them in equipment that has a PCMCIA slot. FlashPath, although providing much lower data-transfer rates, is a more universal alternative for both PCs and embedded systems. The FlashPath floppy-disk adapter costs $129.

--by Brian Dipert

Toshiba Corp, Irvine, CA. 1- 714-455-2000, fax 1-714-859-3963, www.toshiba.com.

128-Mbyte, miniature optical-storage card debuts

Noting the popularity of CD-ROM as a software and data-distribution medium, venture-funded Ioptics has developed a 128-Mbyte, miniature optical-storage media, OROM (optical read-only memory), which can serve in portable systems and embedded applications. Unlike rotating CD media, OROM technology uses a fixed surface to store "patches" of data. An array of 5000 organic LEDs in an OROM reader can individually illuminate data patches containing pixels that are stamped onto plastic OROM media. The rear side of the media includes lenses that direct the data patterns onto a reflector lens, back through a transparent window in the center of the media, and onto a CMOS image sensor.

Ioptics claims that the technology will yield 10-msec access times and 1.6-Mbyte/sec data-transfer rates. The OROM medium measures 59×46×2 mm--three-fourths the length of and about the same width as a business card. The company believes that volume-produced OROM media will cost $2 to $3, and readers will sell for around $200 to end users. The company is primarily targeting OROM as a distribution media for ultraportable computers; small-embedded systems; and appliances, such as video game consoles. Microsoft has invested in the company because of the applicability of the technology to Windows CE-based systems.

Several roadblocks exist to Ioptics' proliferation of OROM technology. Current demonstration units use glass media and CCD-based sensors. The company hopes to demonstrate less expensive plastic media and a CMOS-based reader late this summer, and those advancements are critical for Ioptics to hit its price targets. The first OROM readers will also stand 20 mm high because of the optical design and light path, although the footprint will be about the size of PC Cards. The height will restrict usage in many applications, and the company plans to design slimmer units. Still, Ioptics plans to ship production units by mid-1999 and plans to license other companies to produce both OROM readers and media

--by Maury Wright

Ioptics Inc, Bellevue, WA. 1-425-468-2400.

DSOs double bandwidth, slash price

Two members of LeCroy's LC584A family of four-channel, 1-GHz-bandwidth, color-display DSOs offer twice the bandwidth of their predecessors at no increase in price. The third family member, the $20,990 LC584A doubles its predecessor's bandwidth and offers a price more than 20% lower. This unit offers an acquisition memory depth of 250k samples/channel and a maximum sampling rate of 2G samples/sec, regardless of how many channels are active. A new proprietary IC improves the scopes' trigger capabilities. Among several new trigger features is glitch triggering on pulses as narrow as 600 psec.

As you turn off channels, the two higher priced members of the family interleave both memory and ADCs to increase memory depth and sampling rate. The $24,490 LC584AM offers a memory depth of 2M samples in single-channel mode; the $37,490 LC584AL offers 8M samples in single-channel mode. Both units can capture 8G samples/sec in real time in the single-channel mode.

At the same time as it announced these three DSOs, LeCroy announced several other products, including the $1875 TTK timing-and-jitter tool kit, which you can order as part of the new scopes or as a retrofit to any of the company's LC or 9300 series scopes. Among the kit's functions is measurement of cycle-to-cycle jitter on an unlimited number of cycles. Another of the products is the $2495 AP033 dc to 500-MHz differential active probe. This probe works with other manufacturers' scopes as well as with LeCroy's scopes. Two other products are disk-drive analyzers, which are four-channel DSOs for disk-drive testing. The $39,990, 1G-sample/sec DDA-110 and 2G-sample/sec $44,490 DDA-120 offer memories of 4M samples/channel with all channels active.

--by Dan Strassberg

LeCroy Corp, Chestnut Ridge, NY. 1-800-453-2769, www.lecroy.com.

Accelerator system ensures no downtime in RAID systems

The FileArray Accelerator RAID controller from Adaptec processes I/O requests at the file-system level rather than the block level of conventional controllers. The board uses a distributed architecture that's compatible with Windows NT. The method distributes the file system between the PC's host processor and an intelligent µP on the accelerator board. In this way, the file-system function and other related I/O functions move off the host processor, significantly reducing the host-side I/O code path (I/O stack).

The PCI-to-SCSI accelerator card uses a 32-bit PCI local bus. It contains 4 Mbytes of ECC-protected, nonvolatile DRAM and 4 or 16 Mbytes of parity-protected data cache. The burst data-transfer rate is as high as 133 Mbytes/sec; the SCSI synchronous data rate is as high as 80 Mbytes/sec (40 Mbytes/sec per channel). The FileArray Accelerator supports SCSI Ultra Fast and Wide (8 and 16 bit). It provides RAID support for RAID 5, 0, 1, and 0/1. RAID 1 provides mirroring for fault tolerance. The system costs $2995.

--by Bill Travis

Adaptec Inc, Milpitas, CA. 1-408-945-8600, fax 1-408-262-2533, www.adaptec.com.

Calendar

May 11 to 14

Custom IC Conference, Santa Clara, CA, offers four educational tracks, covering IC design, wireless-IC design, advanced integration issues, and high-level design techniques. The conference offers 127 papers in 24 technical sessions focus on analog, RF, wireless, DSP, and custom design. A session on system-on-a-chip integration ad-dresses ASIC-based-system-design issues. Sessions also review clocking and low-power design methodologies, library design, wafer fab, test/reliability, and simulation/ modeling techniques. Registration for the conference and educational sessions costs $565 for IEEE members who register by April 17 and $655 for on-site registration; registration for nonmembers costs $640 by April 17 and $730 on-site.

Custom IC Conference, Gaithersburg, MD. 1-301-527-0902.

LDO regulator melds virtues of conflicting technologies

Despite the potential efficiency of switching regulators, low-dropout (LDO) regulators are popular in designs having 50- to 100-mA currents and in which distributed power regulation benefits performance. Historically, CMOS LDO regulators have lower dropout voltage, lower ground current, and higher output accuracy than do bipolar or BiCMOS designs. However, bipolar and BiCMOS designs excel with higher ripple rejection, tighter dynamic line and load regulation, lower noise, and higher peak-output current.

To get the best features of both technologies and achieve superior RF performance, Impala Linear Corp uses a proprietary design for its CMOS ILC7081 LDO regulator. The device targets applications such as cellular phones, which have numerous rail transients and inherent RFI. It features ripple rejection of 85 dB at 1 kHz and 60 dB at 1 MHz--30 to 40 dB better than other LDO regulators. The device requires no high-frequency input filter, thus saving space and cost, and needs only a 0.47-µF ceramic output capacitor--less expensive than the tantalum capacitors that these regulators typically require.

The 1%-accurate regulator has 100-mV dropout and just 100-mA ground current at a 100-µA load. Dynamic line regulation, DV_OUT, is 2 mV with a 1V/µsec change in input from 1 to 2V above nominal value at a 50-mA load. Noise for the SOT23-5 packaged-device, which is available in 3, 3.3, 3.6, and 5V versions, is 80 µV rms from 300 Hz to 50 kHz; you can further reduce the noise by adding a 470-pF capacitor to the output.

--by Bill Schweber

Impala Linear Corp, Sunnyvale, CA. 1-408-730-3778, fax 1-408-730-3788, www.impalalinear.com.

Baseband controllers shrink DECT products

Two highly integrated baseband controller ICs help you reduce the size, power consumption, and cost of digital enhanced cordless telecommunication (DECT) products. Intended for residential phones, National’s SC14402 IC is optimised for handsets; the SC14422 version suits domestic base stations. Both ICs comply with Generic Access Protocol (GAP) specifications, which ensure interoperability with DECT equipment from various manufacturers.  The SC14402 handset IC is a ROMless 3V CMOS de-sign that addresses up to 256 kbytes of external memory. The LMX3161A companion IC implements the DECT IF and RF transceiver stages in a single chip. Handsets using the SC14402 and LMX3161 can provide more than 150-hour standby and 15-hour talk time using three AAA-size NiMH batteries.  The SC14402’s functions include a burst-mode controller that supports ciphering, an adaptive differential pulse-code-modulation (ADPCM) transcoder, an echo cancellation processor, a codec, a universal radio interface, and intelligent power management. You can directly connect a speaker, microphone, keyboard, and buzzer. A MicroWire interface suits LCD, seven segment, and dot matrix displays. The SC14403A ROM version is available for very high volume applications.  The SC14422 base station controller is similar to the SC14402 but addresses up to 1 Mbyte of external memory. The base station controller has two ADPCM transcoders, I/O expanders, and a synchronous serial interface port. You can select from seven line interface formats and connect directly to analogue or ISDN line interfaces. The ROM version is named the SC14423.  Both baseband controller ICs integrate two processors. A dedicated time-division multiple-access (TDMA) processor handles time-critical functions, such as physical layer slot formatting and interfacing with the radio control system. The main processor is a CompactRISC 16-bit design that controls the GAP protocol stack and performs system housekeeping tasks. You can program the CompactRISC processor in C to control interactions among communication layers. The handset IC and base station have 4 and 6 kbytes of RAM, respectively. The IC is packaged in a 100-pin thin plastic quad flatpack that measures 14×14 mm.                

—by David Marsh  

National Semiconductor, Furstenfeldbruck, Germany. +49 180 532 7832, www.national.com.

Boost regulators isolate loads during shutdown

Cell phones and other battery-powered products using high-current boost regulators often need to isolate the battery from the load. Load disconnection helps extend battery life by switching off all unnecessary circuitry during standby. Micro Linear’s ML4870 regulator family integrates shutdown control logic and the load disconnection switch with normal regulator functions.  The ML4870 is a continuous-conduction boost regulator designed for dc/dc conversion in multiple-battery power supplies. Continuous conduction topology allows the regulator to maximise output current for a given inductor size. The regulators are available in 3.3 and 5V versions; minimum peak output current for the units equals 1.1A. A trimmed 2.4V reference holds output voltages stable to within ±3%.  Pulse frequency modulation varies the regulator’s switching frequency to greater than 200 kHz in response to load conditions, allowing small inductor values and increasing conversion efficiency. An integrated synchronous rectifier eliminates the normal external Schottky diode and provides a lower forward voltage drop. Peak efficiency equals 85% (exceeding 80% under all normal operating conditions). The shutdown input stops the regulator from switching and isolates the load from the battery. Maximum quiescent current during shutdown measures 20 µA.  An ML4770 version adds a resistive divider that lets you program output voltage levels from 3 to 5.5V. Both IC versions work to 1.8V input levels, making them compatible with alkaline, NiCad, NiMH, and lithium-ion batteries. The units are packaged in eight-pin SOICs.

—by David Marsh  

Micro Linear, Thame, UK. +44 1844 263 052, www.microlinear.com.

Very high density connectorshave <500-psec rise time

Teradyne’s very high density metric (VHDM) interconnection system packs up to 40 signals/cm, with rise-time performance to 200 psec. Designed for 50ohms environments, the VHDM system is a modular pin-and-socket design built on a 2×2.5-mm grid. Stripline shielding maintains crosstalk performance and reflection characteristics, letting you use all of the connector pins to transmit signals. The system supports six contact rows that fit on 18-mm slot-to-slot backplane pitch and eight contact rows that suit a 22-mm pitch.  VHDM connectors comprise an array of individual contact wafers, each of which has a set of signal pins on one side and the stripline shield on the other. Wafers mount side by side in multiples of 10 or 25 to form blocks of signal columns. You can add power or polarising components between blocks as well as specify coaxial, fibre-optic, and transmission line component options. You can choose right angle, mezzanine (stacking), or in-midplane formats, where daughterboards plug in from either side. Daughterboard assemblies incorporate a stainless steel stiffener that holds long blocks rigidly and secures the board when inserted.  Connector contact beams have hidden leading edges to avoid mismating due to pins getting trapped behind contact tips. Teradyne used finite element analysis techniques to design a connector that you can mate easily without stressing the base material, even in dense applications. Exactly controlling the normal contact force and the pin entry geometry results in mating forces of 40g/contact. Eye-of-needle press-fit terminations and high temperature plastics ensure that VHDM connectors are compatible with surface-mount manufacturing processes.

—by David Marsh  

Teradyne, Bracknell, UK. +44 1344 426899, www.teradyne.com.

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