April 23, 1998

EDN's 1998 DSP 16-BIT Architecture Directory

DSP Group Pine/Oak/Teak cores

DSP Group developed the Pine, the Oak, and the new Teak DSP cores and licenses them to developers. The Teak core is binary compatible with the Oak core, allowing Teak to replace Oak. In addition to having half the current consumption of the Oak core, Teak is a synthesizable core and supports real-time emulation through a JTAG interface. DSP Group is also working on its next-generation Palm DSP core, which is a multiprocessor with two arithmetic units that operate in parallel. DSP Group will offer Palm as a 16-, 20-, and 24-bit, fixed-point DSP. At the system level, the chips comprise a 16-bit DSP core with links to on-chip program ROM, data RAM, and a bus-interface unit. All DSPs have built-in power-management features to cut power dissipation, including 2.7V parts and static operation to further reduce power consumption. Internal control can automatically shut off unused functional units and memory.

Pine has two data buses and one program bus, two RAM data blocks for X and Y memory, a data-arithmetic-address-generator unit (DAAU), a multiplier, a 36-bit ALU, two accumulators, and a multiply-accumulate (MAC) unit. It also includes two zero-overhead-loop mechanisms: a single-word instruction loop and a block repeat. An on-chip emulation module provides trace and breakpoint capabilities for real-time debugging. Oak expands on Pine by adding a bit-manipulation unit (BMU), an exponent unit, four nesting levels of block-repeat, and an expanded instruction set. Oak also has an indexed addressing mode and a software stack to improve its usefulness with C programming. (Pine has a limited level-hardware stack.) Teak expands on Oak by adding a second MAC unit and support for faster task switching.

Oak's multiplier has two 16-bit input registers and takes two 16-bit, signed or unsigned numbers and delivers a 32-bit 2's complement product in one cycle. The multiplier then sign-extends the product to 36 bits through 4 guard bits. The ALU performs arithmetic/logical operations on the data operands. It also performs functions such as step division and rounding. The BMU has a 36-bit barrel shifter, a bit-field-operation unit, and two additional 36-bit accumulators. The bit-field-operation unit reads from memory, modifies, and writes back to memory, bypassing the accumulator. Bypassing the accumulator not only frees a critical hardware resource, but also avoids the use of the accumulator's high-power-consumption circuitry. Cellular phones use bit-field operations to pack the bits before putting the data onto the channel. The two accumulators and a set of shadow registers enable rapid context switches; the accumulators can also evaluate 36-bit exponents. The accumulator optionally saturates out-of-range values as they transfer to 16-bit registers or memory.

At each cycle, the three buses move X- and Y-memory data to the MAC unit from core X and Y data RAMs while the program-control unit (PCU) fetches a new instruction from program-space ROM or RAM. The X-data bus also serves as the main CPU data bus by linking the two data RAMs, the status registers, the computation unit, the BMU, the DAAU, the PCU, and a set of general-purpose registers.

The DAAU generates X- and Y-memory addresses for each MAC cycle and modifies the pointers after operations, including modulo addressing. It has 16-bit pointer registers for addressing: a stack pointer, a base register, and three other registers that handle configurations of the DAAU. The stack pointer references the top of the software stack for interrupt, subroutine-processing calls, or temporary saving. You can define four additional on-chip, general-purpose registers that are not part of the DSP core but that the instruction set supports. These registers can be handy for application-specific hardware, such as a Viterbi accelerator.

Oak supports DMA operations, downloading capabilities from data-memory space to program-memory space, an automatic-boot procedure, and a 64k-word X- and Y-data space and 64k-word program space. The X-RAM space can be in internal and external memory; the Y-RAM space is in only core internal memory. You can expand the X and Y memories in the core to 2k words. (However, licensees can expand memory beyond 2k words, but this procedure requires redesigning portions of the core.) Only the X memory expands externally to 62k words. This limit on memory expansion potentially limits the performance of certain applications that require simultaneous access of X and Y memory of more than 2k words. The off-core program memory can expand to 64k words. All cores have a built-in, 16-bit loop counter for repeating instructions or instruction blocks as many as 65,536 times. Oak allows you to nest a repeat instruction in a loop block with as many as four levels of block nesting.

Addressing modes

The Pine and Oak DSP cores support direct, register, indirect, relative, and short and long immediate-addressing modes. Oak also supports index and long direct-addressing modes.

Special instructions

The devices support conditional subroutine call/return from a subroutine and interruptible- and block-repeat instructions. (Pine has one repeat level and one block-repeat; Oak has four levels of nesting.) They also support division step, bit-field test and set (Oak only), compare, square, accumulate/subtract previous product, move data/program memory, conditionally modify accumulator, double-precision calculations, bit-field operations, exponent evaluation, normalization, context switching, minimum/maximum calculation with pointer latching and modification, delayed return, and automatic boot. Teak will also include special instructions to support Viterbi acceleration and FFTs.  

Support

DSP Group supplies in-circuit-emulator and evaluation/development boards and on-chip-emulation capabilities; the company also sells a bond-out chip for emulation and debugging. Software tools include an assembler/linker; a loader; a debugger; a C compiler; and the Assyst simulator, which enables users to map their customized logic into the tools. You can also build-in an On-Chip-Emulation-Module (OCEM) that communicates with the debugger software through a JTAG or an RS-232C interface. All tools run under Windows; some tools also run under Unix. Check out DSP Group’s third-party developers at www.dspg.com/prodtech/core/3rdparty.htm. 

Licensees

The DSP Group’s licensees include Adaptec (www.adaptec.com), Atmel/ES2 (www.atmel.com), DSP Communications (www.dspc.com), Fujitsu (www.fujitsu. com), GEC Plessey (www.gpsemi.com), Harris (www.harris.com), Hyundai (www.hea.com), LSI Logic (www.lsilogic.com), NEC, Rohm (www.rohm.com/rohmlsi.html), Samsung (www.samsungsemi.com), Siemens, Taiwan Semiconductor Manufacturing Co (www.tsmc.com), VLSI Technology (www.vlsi.com), and Xicor (www.xicor.com).

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