April 23, 1998

EDN's 1998 DSP 16-BIT Architecture Directory

Zilog Z893xx

The Z893xx has an accumulator-based DSP architecture built around a single-cycle multiply-accumulate (MAC) unit, which includes a 16×16- to 24-bit multiplier with automatic truncation, a 24-bit product register, and a 24-bit accumulator and ALU with no guard bits. The DSP runs from a 4k- or 8k-word, one-time-programmable program ROM. (The Z8939x can also access 64k words of external program memory.) Two internal bus sets--a program-address/data-bus set and a data-address/data-bus set--allow the processor to access program and data concurrently with a MAC operation.

Two RAM blocks hold program coefficients and data, which automatically feed directly into the MAC's input registers each cycle. RAM-block addressing automatically increments or decrements the address, which eliminates the need for data-address-generation code for each MAC cycle. Results of the MAC land in a product register and 24-bit accumulator during each cycle. You can treat the product register as a general-purpose register when it is not performing multiplies. Although the Z893xx lacks a barrel shifter, a shifter between the product register and ALU allows you to shift the result right by 3 bits before adding it to the accumulator.

The basic DSP chip has external program (Z8939x only) and I/O buses. You can use the I/O bus to access peripheral devices, such as an ADC. The DSP chip stores   the data you access through the I/O bus in eight external registers, which the DSP core can access. However, because the chip offers no DMA support, the processor must perform the data transfers. An external-memory read/write takes one cycle. You can insert a wait state using software control; you can use the wait pin for additional wait states. Running code from external memory takes one additional cycle for each instruction; the chip reads the data in one cycle, but the data is unavailable for processing until the next instruction cycle.

Some Z893xx devices have a codec interface that is compatible with 8-bit PCMs, 16-bit codecs, and 16-bit stereo sigma-delta codecs. You can adapt many general-purpose, 8- and 16-bit ADCs and DACs to this interface. You can also use the interface as a high-speed serial port or general-purpose counter. Z893xx chips also have one 13-bit timer for the codec interface and one 13-bit timer for general-purpose uses.

Addressing modes

The Z893xx supports memory-direct addressing for as many as 512 RAM-based words; it also supports register-indirect addressing to RAM or ROM dith-pointer registers and immediate, short-form direct addressing using 16-bit data registers in RAM. It provides one-cycle, external-peripheral addressing, treating the peripheral as a register. Modulo-addressing options include Modulo 2 to 256 for data access.

Special instructions

The Z893xx performs compare register to accumulator, conditional execution of certain instructions, and conditional branching and subroutine calls. The Z893xx does not perform repeat (hardware looping) or bit manipulation.

Support

Zilog offers a C compiler, an assembler/linker, a simulator, a source-level de-bugger, and application libraries. The company also has a TMS320-to-Z893xx assembly-code translator. Zilog sells an evaluation board and an in-circuit emulator for the Z893xx.

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