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May 21, 1998
Use spread-spectrum techniques to reduce EMI
In many countries, EMI requirements limit the selling of PCs.
Spread-spectrum techniques are cost-effective ways to control clock-generated EM
emissions.
EMI is a major concern in PC design, because it determines
whether a system or PC motherboard gets approved for sale by the US Department of
Commerce. This situation is especially true in designs that feature Pentium-class
processors, high-speed buses, and several clock outputs. EMI testing occurs late in the
design process, so failing the test can mean expensive redesign and increased time to
market. In addition to material costs, using shielding as a way to reduce EMI
significantly increases production complications, further driving up system cost.
An alternative approach is to control EMI by eliminating
rather than merely containing it. One expensive and time-consuming way to achieve this
goal is to redesign a system specifically to reduce emissions once you determine its EMI
levels. A more efficient and cost-effective alternative is to control clock emissions, a
major source of EMI.
Harmonics and multiple lines create the problem
EMI is a growing problem in today's computers because they
operate faster, which requires shorter rise times for square-wave clock signals. Also,
system motherboards have more clocked elements, resulting in more lines to radiate energy.
For example, in a 486-based system with a 66.6-MHz bus, the rise times are typically 2
nsec. Generating a square wave with this rise time does not produce a large number of
higher order harmonics. Furthermore, the system most likely uses extended-data-out (EDO)
DRAM, which has its own clocking scheme and is not operating at a 66.6-MHz clock rate. As
a result, a limited number of lines radiate a relatively low level of harmonic-content
energy, so traditional EMI shielding practices are adequate.
In a Pentium-based system, clock rise times are
approximately 800 psec, even with a 66.6-MHz host clock. To generate a square wave with
such a rise time, you create much greater higher-order harmonic content, which contains a
high energy level. With a clock frequency of 100 MHz, the problem becomes worse because
the harmonics are at much higher frequencies and contain even more energy.
In addition, the Pentium system most likely uses
synchronous DRAM (SDRAM), so every slot has four clocks. A high-end computer has four
slots, 16 memory-clock lines, and four lines for the CPU. Thus, numerous lines radiate
large amounts of energy. Because the outputs are synchronous, the system simultaneously
switches all 16 lines, causing a large energy spike and generating excessive spectral
energy.
Alternatives to shielding
 Pulse
shaping, slew-rate control, staggered outputs, and spread-spectrum techniques can reduce
clocking-related EMI. Of these, spread spectrum is the easiest to implement and the most
efficient. Spread spectrum slightly modulates a clock signal's frequency,
spreading the energy of the fundamental frequency to minimize any energy peaking at
specific frequencies (Figure 1). This approach
reduces the fundamental-clock-frequency EMI, as well as the higher frequency harmonic
components, reducing total system-EMI radiation. By reducing its spectrum-peak amplitude,
a system more easily and more cheaply meets the standards of electromagnetic-compatibility
(EMC) tests than do other EMI-containment techniques.
One technique designers use to reduce EMI is pulse shaping,
which requires control of the output waveshape. You use pulse shaping to try to control
higher frequency harmonics. Pulse shaping does not control the spectral energy of the
fundamental but changes the shape of the rising edge, rounding off the corners and
reducing some of the higher frequency components and their energy.
Pulse shaping works if you can control the portion of the waveform near the switching
threshold.
Unfortunately, pulse shaping makes for a difficult
balancing act between too much rounding, which can begin to look like more of an analog
function, and not enough rounding to achieve the desired EMI reduction. In addition,
process, temperature, and voltage variations disrupt the balance. The techniques you use
to obtain optimum rounding may not give consistent results from run to run in
manufacturing. For example, carefully set capacitive or resistive shaping values change
from production lot to production lot. As a result, you must overdesign the system to
ensure that process variations leave sufficient EMI control and rise time.
Also, pulse shaping changes only the higher order harmonics
and not the fundamental frequency. Supposedly, enough room is available under the
peak-power level that the fundamental does not exceed allowable tolerances. This
assumption may not be true, particularly in light of changing FCC regulations.
Another approach to reducing EMI, slew-rate control,
manages the rising-edge slope by maintaining an output drive that doesn't overcharge load
capacitance. Slew-rate control achieves this maintenance by creating a current-controlled
output that avoids having a fast, high current and should theoretically be effective.
However, as with pulse shaping, a major issue is how well you can maintain that control on
a manufacturing lot-to-lot basis and across various voltage and temperature ranges. The
design must account for the worst-case process and for both high and low temperatures and
voltages. These potential variations are both critical and unpredictable. As a result,
slew-rate control is difficult to implement and unreliable.
Another alternative is staggering the outputs in a system
using SDRAMs. As noted before, a high-end system typically has 16 memory lines, all of
which theoretically switch at once. In practice, you cannot achieve absolute synchronous
switching, so design specifications allow a 250-psec window within which the system must
switch all the lines. For example, the system can set one group of lines 110 psec early;
another, 30 psec early; a third, 30 psec late; and a fourth, 110 psec late. This approach
would temporally spread the energy. The frequencies remain the same, but they're
phase-shifted, decreasing the energy that appears at any instant and
reducing EMI.
A major drawback of output staggering is that
output-to-output and tolerance-related variations are inherent and might by themselves
occupy the time window. So, although output staggering is
theoretically good, maintaining target control over manufacturing, voltage, and
temperature variations can be difficult and make this technique unacceptable.
Another approach, spread spectrum, spreads the energy of a
fundamental frequency to minimize any peaking of energy at specific frequencies. This
technique reduces both the fundamental-frequency EMI and the higher frequency harmonic
components, significantly reducing overall system EMI radiation without compromising
clock-edge rise and fall times. With lower spectrum-peak amplitudes, a system meets and
has more margin for EMC. Spread spectrum is the simplest, most efficient technique and
offers the most immunity to manufacturing-process variations.
Spread-spectrum basics
In measuring EMI to determine regulatory compliance, the
FCC samples the spectrum a system emits. Basically, someone sweeps a spectrum analyzer
across a frequency range to look for energy peaks that exceed a limit. If the energy from
a fundamental peak spreads to a band plus or minus some percentage on either side using a
controlled shift pattern, the energy is lower at any frequency. The same energy still
exists but is now spread across a controlled range of frequencies. Spreading the spectrum
lowers the fundamental-frequency energy because the clock spends part of its time at a
lower frequency and part at a higher frequency. Despite the energy spread, the clock is
still a square wave.
For example, you might modulate a 66.6-MHz clock frequency
by 1%. The period for a 66.6-MHz clock is 15 nsec, so a 1% modulation would be 150 psec;
the period would move 75 psec on either side of 15 nsec in a controlled manner. Engineers
design the system to respond with a clock that has some variation, because it must
accommodate inherent random variations. Because you design the system for clock
variations, slowly varying the clock does not affect system operation.
Modulation amount and rate
The amount and rate of fundamental-frequency modulation are
two of the first decisions you must make when implementing a spread-spectrum design. You
base both decisions on practical considerations. For example, experience shows that a
spread of 0.5% sufficiently reduces EMI and remains close to the clock frequency, which
means less tracking variation.
Similarly, modulation-rate selection involves a number of
empirical considerations. For its spread-spectrum-enabled clock chips, Integrated Circuit Systems (ICS,
www.icst.com) uses a 50-kHz modulation rate. ICS chose this rate because it is higher than the normal
audio frequency, eliminating the chance of a user's hearing a high-pitched squeal from the
system. ICS also chose the rate for compatibility with
the chip set and CPU, both of which have PLLs that operate with a loop bandwidth of
greater than 1 MHz.
 The most important design decision is whether to use
center- or down-spread modulation (Figure 2).
Center-spread modulation shifts the frequency above and below the original fundamental
frequency. The advantage of this modulation is that average system frequency is always the
same. The system always sees a 66.6-MHz clock as a 66.6-MHz clock, so performance does not
degrade from board to board.
The major disadvantage of center spreading is that it
technically violates the guidelines for µP operation, which for a 66.6-MHz clock
specifies a 15-nsec period, plus or minus typically 250 psec of jitter. However, you can
make a case that, if the spreading modulates the period by only 75 psec, sufficient
guardband remains for random variations. In practice, experiments show center spreading to
significantly reduce EMI radiation without degrading performance.
An alternative technique is down-spread modulation, in
which you shift the carrier frequency down by half the modulation amount so that you
center the modulated waveform on a new carrier. The peak of that modulation is at the
original carrier. For example, you move a 66.6-MHz fundamental down by 0.5% if you select
a 1% modulation. A 75-psec carrier modulation means that the fastest and slowest clock
periods are 15 and 15.15 nsec, respectively. However, the average clock period is 15.075
nsec, which is 75 psec lower than the period of a 66.6-MHz clock, meaning that the average
frequency is actually 66.3 MHz. The advantage of down spreading is that it ensures that
your system does not exceed the maximum processor clock speed. However, the lower average
clock speed also slightly decreases performance.
Modulation implementation
You can modulate fundamental carrier frequency in several
ways. One way is to directly modulate the reference clock. However, a major drawback of
this technique is that the rest of the system also uses the reference, and many of the
components, such as a floppy-disk drive, need a steady clock. With this technique, you
would corrupt any fixed-frequency clocks, and those fixed-clock components would not
operate properly.
 The
one technique that provides the most accurate and predictable results for a main clock
system is to modulate the input of the VCO in a PLL (Figure
3). This technique uses the reference clock as a control element and has
counters that look for time events to determine the location of the modulation at specific
times. When the circuit identifies these events, it modulates the PLL, feeding a control
voltage to the VCO. Feedback from the phase detector indicates whether the clock is above
or below the target frequency, and the circuit accordingly adjusts the current sources.
With this technique, clocks requiring a fixed frequency are unmodulated, and those that
cause major EMI problems, such as memory and CPU clocks, are modulated.
Results using spread-spectrum modulation
 A
wide-view spectrum plot for a 66.6-MHz clock from the fundamental frequency to the fifth
harmonic shows the peak reductions you would achieve with a ±0.5% center-spread shift (Figure 4). A magnified spectrum plot for a
66.6-MHz clock shows the energy reduction  with a 0.5%
center-spread and a ±0.5% (0 to 1%) down-spread shift over an unmodulated signal (Figure 5).
Reviewing the discrete frequency for each cycle number
across the normal spectrum of a 66.6-MHz clock (Figure 6),
you can see the energy dispersion resulting from both a ±0.5% center-spread modulation
and a ±0.5% (0 to 1%) down-spread modulation.  As these timing
waveforms illustrate, spread-spectrum techniques clearly meet the goal of decreasing EMI
by smoothly changing clocks while dispersing energy most efficiently across a range of
frequencies relative to the fundamental frequency. Using spread-spectrum techniques is
viable to answer the growing need for EMI control. |
