September 1, 1998

WHAT'S HOT IN THE DESIGN COMMUNITY

Audio DACs extend four R's: resolution, rate, range, and ratio

High-end digital-versatile-disk and CD players, as well as digital audio studios, need performance beyond what most audio DACs can provide. Burr-Brown's PCM1704 fills that niche with 24-bit resolution and an 8X-oversampling, 96k-sample/sec sampling rate. The 20-pin SOIC also provides commensurate dynamic range and SNR specs of 112 and 120 dB, respectively. THD plus noise is typically 0.0008% for this ±5V device. The BiCMOS IC includes a sign-magnitude architecture that quashes glitch and other nonlinearities around the zero point. Maximum current output is ±1.2 mA; settling time to 0.0003% for a full- current step is 200 nsec. You can also use this $12.95 (1000) DAC for nonaudio applications, such as waveform-synthesis systems.

Analog Devices, too, is addressing this high-end market with its AD1855 DAC, which has 16- through 24-bit data-sampling capability. With 113-dB dynamic range and 110-dB SNR at 96 kHz—matched by -97-dB THD plus noise—this DAC easily interfaces to DSPs and audio processors. It accepts data via an I²S three-wire or serial port, in left- and right-justified 16-bit data transfers (among other formats). The 5V, 28-lead SSOP IC is $3.95 (10,000) and includes continuous-time filters for its stereo channels, plus clickless volume control and mute.

—by Bill Schweber

Analog Devices Inc, Norwood, MA. 1-781-937-1428, fax 1-781-821-4273, www.analog.com.

Burr-Brown Corp, Tucson, AZ. 1-520-746-1111, fax 1-520-746-7401, www.burr-brown.com.

Tiny modules provide big computer power

A series of power modules from Lucent Technologies provides point-of-load regulated power in workstations, servers, laptops, and data-networking applications. The Titania Series includes modules smaller than a credit card and occupies only one-third the space that voltage-regulator modules (VRMs) designed for µPs require. The modules' 5 million-hour MTBF is also an order of magnitude greater than that of traditional VRMs. The Titania supplies use a standard, low-cost, 50-pin connector. The nonisolated power modules are available with an input range of 3.3 to 48V dc and with output voltages of 1.3 to 3.5V at 16 to 20A. A 5-bit word from the µP load programs the output voltage. Titania supplies meet VRM 8.3 output-transient specs without the need for external capacitors. The modules cost $25.10 (10,000)

—by Bill Travis

Lucent Technologies, Mesquite, TX. 1-972-284-3350, fax 1-972-284-2175, www.lucent.com.

Integral sense saves cents in current-gauging ICs

Current represents an electron flow at a specified point. The most practical way to measure this flow is by inserting a small-value resistor in the current path and sensing the voltage drop across it. Two vendors are now integrating such a sensor resistor into their products' voltage-reading and -control circuitry, thus eliminating one discrete component and improving sensing consistency. National Semiconductor's LM3812 high-side-sensing and LM3813 low-side-sensing current-gauging ICs provide a 2%-accurate PWM output, indicating the current magnitude and sign, for battery monitoring and charging circuitry. The 4-mOhm sense resistor is built into the lead frame; its low value minimizes voltage drop, the nemesis of current sensing. You can order a ±1 or ±7A version of either device, as well as a precision-mode version with averaging over a 50-msec time period or a fast-mode version with averaging over a 6-msec window. The eight-pin SOICs cost $1.52 (1000).

Unitrode's UCC3926 analog-voltage-output IC works in currents as high as ±20A. It incorporates a 1.3-mOhm internal shunt resistor within its lead frame, and you can use it in both high- and low-side referenced configurations. Unitrode scaled the device's internal transimpedance amplifier to develop a 500-mV differential output signal for a 15A sensed current with 2% accuracy; a separate output pin indicates the current's sign. The 16-pin, $3.60 (1000) IC also includes a user-settable overcurrent indicator output for signaling when the sensed current exceeds a preset value.

—by Bill Schweber

National Semiconductor Corp, Santa Clara, CA. 1-800-272-9959, www.national.com.

Unitrode Corp, Merrimack, NH. 1-603-424-2410, fax 1-603-424-3460, www.unitrode.com.

Software drivers for instruments become device-independent

A new architecture for instrument software drivers solves a problem that has long bedeviled engineers who develop and maintain test systems. The system designers' goal is to use their applications unmodified for many years. If the product under test is successful, however, additional copies of the test setup often become necessary. And, frequently, some of the instruments in the original setup may be obsolete when the time comes to build additional setups. This situation often necessitates rewriting applications and maintaining different code for setups that perform the same task but differ slightly. The Interchangeable Virtual Instruments (IVI) Foundation (www.ivifoundation.org) aims to eliminate such headaches. The foundation's membership list reads like a who's who of electronics and aerospace companies. For the most part, the members are large companies that invest heavily in test development.

IVI technology, which builds on the virtual-instrument systems architecture (VISA) of the VXI Plug&Play Systems Alliance (www.vxipnp.org), segments drivers into layers (see Figure). Only the lowest layer contains code that is specific to a particular instrument model. By using this approach, the application code must be aware only of the generic type of instrument with which the application communicates—a digital oscilloscope, for example. The application need not contain elements that are specific to any scope model or even to scopes of one manufacturer. If you build a new test setup that uses a different scope, you need only change the link to the portion of the driver that is specific to the model you're using. The foundation expects that manufacturers will eventually supply such instrument-specific software with their hardware.

IVI drivers are compatible with National Instruments' LabView and LabWindows/CVI, with Microsoft's (www.microsoft.com) Visual Basic and Visual C++, and with other software that can call dynamic-link libraries (DLLs). The initial driver library ($1495) works with PCs running any 32-bit version of Windows and with workstations that run under the Solaris OS. The library provides generic drivers for oscilloscopes and waveform digitizers; DMMs; arbitrary-waveform and function generators; switches, multiplexers, and matrices; and programmable power supplies. Users of LabWindows/CVI V5.0 can use the software package's instrument-driv-er-development wizard to create instrument-specific drivers that meet IVI architecture requirements. A training course ($1295) provides more information on writing such drivers.

Besides basic drivers, the library includes tools for debugging drivers and test systems, and even for simulating instruments. The simulation capability is particularly useful for debugging test programs before hardware becomes available.

—by Dan Strassberg

National Instruments, Austin, TX. 1-800-258-7022, fax 1-512-683-8411, info@natinst.com, www.natinst.com.

ADSL IC debuts; standards languish

With demand for fast Internet access booming, companies are rushing to offer ADSL (asymmetrical-digital-subscriber-line) services to consumers. Integrated Telecom Express has just announced a chip set that targets ADSL applications in PCs and other low-cost consumer products. The Scalable ADSL Modem (SAM) chip set can handle 1.5-Mbps downstream data rates to the subscriber and 384-kbps rates back to the central office. Moreover, the SAM chip set and support software sell for $40 (1000)—reaching such an aggressive price by relying on the host to handle portions of the processing tasks. The chip set requires a 300-MHz or faster Pentium II host processor and meets the ANSI T1.413 and G.Lite ADSL standards.

Unfortunately, several roadblocks stand in the way of widely deployed ADSL, despite constant signs of progress. Alcatel (www.alcatel.com), Analog Devices (www.analog.com), and Texas Instruments (www.ti.com) have announced completion of first-round interoperability testing using central-office and ADSL ICs based on ANSI T1.413 discrete multitone modulation. The testing, however, doesn't cover the G.Lite ADSL scheme that PC industry leaders are developing and heavily promoting.

In addition to the lack of a single accepted ADSL standard, price stands in the way of ADSL acceptance. Cable companies have deployed millions of cable modems and typically price their services at $40 per month, including modem rental. Recent ADSL trials indicate that the phone companies plan on charging more than $80 per month for ADSL service, which could make the phone-line-based services a tough sell to consumers.

—by Maury Wright

Integrated Telecom Express, Santa Clara, CA. 1-408-980-8689, www.itexinc.com.

Insulating foundation raises chip speed

IBM Microelectronics has perfected a CMOS process that leads to faster chips. Because of the placement of the transistors on an insulating layer—"silicon-on-insulator" (SOI) technology—the resulting circuits have two advantages over conventional CMOS-process technology. Eliminating transistor parasitic capacitance to the silicon substrate gives you faster transistors and less wasted power from switching currents in the transistor-substrate capacitance.

Flavors of SOI technology have been around for many years. Companies have tried building transistors on insulating material, such as sapphire, to get faster chips and to make SOI-based digital circuits less susceptible to ionizing radiation, such as that encountered by communication satellites orbiting the Earth. However, until now, SOI processes have had limited success because of transistor leakage and other problems induced by SOI processing that limit chip-manufacturing yield. According to IBM, the company has overcome yield problems by using silicon dioxide (SiO₂) as the insulating barrier between the wafer substrate and the transistors.

By using what the company calls "SIMOX" (separation by implantation of oxygen) (see Figure), IBM implants heavy doses of oxygen into the silicon wafer. After implantation, IBM anneals the wafer at high temperature, embedding a thin SiO₂ layer in the wafer with a layer of silicon right above the SiO₂—the SOI film. After the SOI film forms, you process your chips similarly to how you would a conventional bulk-silicon process. IBM states that there are minor process modifications but that you use the same photolithography, tool set, and metallization.

IBM already has SOI chips fabricated on a pilot production line and plans to have the SOI process in production in the first half of 1999 for custom and standard-product chips. The company is in the final stages of qualifying SOI for a 0.22-µm CMOS process and has started development of a 0.15-µm process.

—by Jim Lipman

IBM Microelectronics, East Fishkill, NY. www.chips.ibm.com.

Multilevel-cell memories offer the "write" touch

First-generation multilevel-cell (MLC) flash memories deliver cost savings over standard flash-memory alternatives, thanks to MLCs' 2-bit-per-cell storage capability. However, MLCs provide this savings at the cost of write performance, a trade-off that is unacceptable for some data-storage systems. Hitachi's 256-Mbit MLC memory, based on AND technology, begins from a higher write-speed level and degrades less than its competition with the addition of MLC circuits. Hitachi's MLC flash memory also offers hard-disk-drive, clusterlike block sizes, fast block erase, and high cycling capability; therefore, the Hitachi device should be a more useful storage memory in applications such as digital cameras.

Compared with the company's 1-bit-per-cell 64-Mbit flash memory, Hitachi's 256-Mbit device increases both the erase-block size and the internal-RAM page-buffer size (from 512+16 bytes to 2048+64 bytes in both cases). Hitachi specifies the burst data-transfer rate into or out of the page buffer at 20 Mbytes/sec, with sustained write-transfer rates from page buffer to array of 2 Mbytes/sec (compared with 5 Mbytes/sec for the 64-Mbit memory). Block reads require an initial 50-µsec array-to-page-buffer transfer latency. Typical block-erase time is 1 msec.

Hitachi guarantees a minimum of 100,000 erase cycles per block, which the flash-file system can extend via system-level error detection and correction using the extra block bits. Erase and write current draws are 60 (5V) and 40 mA (3.3V), respectively, with read current specified at 70 mA (5V) and 50 mA (3.3V). The memory also offers ultralow standby and power-down modes, with power-down requiring only 6 (5V) and 3 mA (3.3V). The 256-Mbit MLC flash memory in a 48-lead TSOP costs $90 (1000), and Hitachi also offers 192-Mbyte, $600 (1000) and 640-Mbyte, $2400 (1000) CompactFlash cards.

—by Brian Dipert

Hitachi Semiconductor, Brisbane, CA. 1-650-589-8300, fax 1-650-583-4207, www.hitachi.com/semiconductor.

Motion controller shakes hands with USB

TThe DMC-2000 Series of motion controllers from Galil Motion Control plugs into the Universal Serial Bus (USB). The controllers are available in one- to eight-axis configurations; they can thus control both step and servo motors on any combination of axes. In addition to the USB, DMC-2000 units provide a variety of communication options, including RS-232C, RS-422, and RS-485, at rates to 115 kbaud. The controllers contain nonvolatile memory for application programs, variables, and arrays, thus allowing operation without a host computer. Multitasking allows simultaneous execution of as many as eight application programs. A variety of software is available for setup, automatic servo tuning, and interface with ActiveX tools. Other available software accommodates DOS and Windows 3.1, 98, and NT. A library of function calls for C and C++ is also available. The controllers cost $1200 (100).

—by Bill Travis

Galil Motion Control Inc, Mountain View, CA. 1-800-377-6329, fax 1-650-967-1751, www.galilmc.com.

SOCKS middleware extends server/firewall features

The growth of the Internet has prompted the need for a plethora of new software services that can set access policies and priorities in Web servers, proxy/cache servers, and firewalls. OEMs essentially need a way to embed a network-management interface into products for the Internet and intranets. The Internet Engineering Task Force (IETF) defined the Sockets Secure (SOCKS) standard as a software layer that lies between the TCP/IP stack and an application program. This approach provides robust security features. The IETF standard RFC 1928 defines version 5 (SOCKS5) of the standard. Now, NEC System Laboratory launches its SOCKS5 Everywhere initiative, attempting to spur use of the technology.

NEC has a two-pronged strategy aimed at widely deploying SOCKS5 both in Windows clients and in all classes of servers, firewalls, and other network equipment. For clients, the company has a royalty-free, Web-based distribution channel so that any developer can embed SOCKS5 capability in applications. The client works with any SOCKS5 server. Concurrently, the company offers source licenses for a server version that meets the SOCKS5 standard and provides an extended set of features. Any SOCKS5 client can access standard server features, and clients based on NEC's software can transparently access the extended feature set. Depending on volume, network-equipment OEMs pay a royalty of $100 to $500 for each device shipped with the SOCKS5 server. OEMs that license the SOCKS5 server must also pay $30,000 each year for support and updates.

NEC has also teamed with Stardust Forums (www.stardust.com) to sponsor the SOCKS Summit 1998. Scheduled for Sept 15 to 18, 1998, at The TechMart in Santa Clara, CA, the SOCKS Summit includes a developers conference and the Socks Interoperability Invitational. Check the Stardust Web site for more details, or call 1-408-879-8080.

—by Maury Wright

NEC System Laboratory, San Jose, CA. 1-408-433-1461, www.socks5.nec.com.

Re-engineering layout tool makes chips look their best

The Xtreme layout tool from Sagantec helps you improve chip performance after physical implementation. You use the tool when you finish chip routing—before extraction and verification—to change interconnect spacing and width for enhanced signal integrity and chip reliability.

By analyzing your layout, Xtreme globally spaces wires on all metal layers to reduce crosstalk without changing chip area. The extra spacing also reduces metal side-wall-capacitance, reducing power dissipation and increasing clock speed. According to Sagantec, benchmarks show that Xtreme reduces cross-coupled capacitance by 40% for 0.35-µm designs and more than 50% for 0.25-µm designs. You can identify critical design nets, allowing Xtreme to treat these nets as special cases by allowing additional spacing. For increased reliability, you can identify wires that may have potential electromigration problems, and Xtreme automatically widens the wires for you. In addition, the tool improves contact-metal coverage.

You use Xtreme on hierarchical designs with any number of routing layers. The tool preserves connectivity and design-rule correctness. Available for use on chips fabricated in 0.35 µm or less, you can use the tool on chips with many types of routing, including sea of gates (gate array), channel based, and special datapath blocks. Xtreme runs under Unix and costs $150,000.

—by Jim Lipman

Sagantec, Milpitas, CA. 1-408-934-1155, fax 1-408-934-1159, www.sagantec.com.

NT workstations dive to less than $2000

The hottest PC market is that for the less-than-$1000 "segment-zero" systems, but Hewlett-Packard has also driven prices below $2000 with Kayak, its Intel-based, Windows NT-workstation family. The new Kayak XA and XA-S systems deliver workstation features such as an industrial-strength chassis and forced-air cooling and come with Matrox (www.matrox.com) Productiva G200 3-D graphics cards. Available in a desktop or minitower case, the base XA model with a 350-MHz Pentium II, 64 Mbytes of memory, and a 4.3-Gbyte ATA hard drive sells for $1900. Configured similarly, the dual-processor-capable XA-S costs $2200. Both systems can optionally support 400- and 450-MHz processors and SCSI disk systems.

—by Maury Wright

Hewlett-Packard Co, Santa Clara, CA. 1-408-246-4300, www.hp.com.

SRAMs take a new approach

Hiding inside MoSys' low-power SRAMs is something you might not expect—DRAM. The company constructs its memory arrays not of six-transistor or four-transistor/two-resistor SRAM cells, as do most other SRAM manufacturers, but of one-transistor, one-capacitor DRAM structures. Advantages of this approach include lower cost per bit at equivalent process lithographies and manufacturing volumes and reduced active-power consumption. However, because MoSys' memories are fundamentally DRAM, they still require refresh, resulting in higher standby-current draw than some ultralow-power SRAM alternatives.

MoSys' first-generation one-transistor SRAMs required a custom system controller to initiate refresh operations, but this second-generation architecture automatically takes care of refresh without the need for system intervention. Internal cache circuitry also eliminates collisions between external access requests and in-progress refresh operations. The results are memories that the company claims are fully pinout- and backward-compatible with true SRAM alternatives.

Devices now available for sampling are the 3.3V, $7 (100,000) MC80364K64, a 64kX64-bit pipeline-burst SRAM (PBSRAM) in a 128-pin QFP package, and the $5 (100,000), 3.3V MC803128K32, a 128kX32-bit PBSRAM in a 100-pin QFP. Operating speeds reach 133 MHz, and the company plans variants with as much as 166-MHz speed and flow-through output to appear by the end of the third quarter. MoSys also plans to develop no-latency versions of its devices (known as NoBL or ZBT by other manufacturers) with first availability by the end of this year; higher densities should follow in 1999.

—by Brian Dipert

MoSys Inc, Sunnyvale, CA. 1-408-731-1826, fax 1-408-731-1893, www.mosys.com.

IC slashes workgroup hub costs

NeoParadigm Labs has developed a three-port Fast Ethernet switching IC that dramatically lowers cost and maximizes network bandwidth in dual-speed 10/100-Mbps hubs. Targeting workgroup, small-office, and even home-networking markets, the NP313 features three ports that can operate at 10 or 100 Mbps. The IC can switch packets between ports even when two ports are operating at different speeds. The dual-speed support allows an NP313-based hub to connect 10- and 100-Mbps Ethernet segments, leaving the third port available as a cascadable connection to other hubs. Prices range from $15 to $25, and the company offers a $395 evaluation kit.

—by Maury Wright

NeoParadigm Labs, San Jose, CA. 1-408-432-0900, www.neoparadigm.com.

IC puts teeth into gear-position-sensing

The MLX90217, a digital-output, rotary-position gear-tooth sensor, converts movement to a digital signal, thereby allowing a controller to determine speed, distance, or revolutions per minute. The Hall-effect IC from Melexis Inc incorporates an on-chip 10-bit A/D converter and logic that together function as a digital S/H circuit. During signal sampling, the logic recognizes changes in magnetic flux density. The output turns on when the flux reaches its peak and decreases by an amount equal to the built-in hysteresis. Similarly, the output turns off after the flux reaches its minimum value and then increases by an amount equal to the hysteresis. The MLX90217 satisfies all DIN EMC requirements for automotive-battery applications. The IC comes in a three-pin SIP and costs $1.16 (10,000).

—by Bill Travis

Melexis Inc, Webster, MA. 1-508-943-9430, fax 1-508-943-0487, www.melexis.com.

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