September 24, 1998

EDN's 25th Annual Microprocessor/Microcontroller Directory

Toshiba TLCS-900
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Toshiba uses the TLCS-900 architecture in several product cores, including the 900, 900/L, 900/H, and 900/H2. The TLCS-900 is a general-purpose, 16-bit core. The TLCS-900/L adds a clock gear and 3V operation to benefit applications requiring low power consumption. The TLCS-900/H targets higher performance applications, and 900 core modifications allow these devices to execute some instructions in fewer states. The TLCS-900/H2 uses the same register and instruction set as the 900 but includes a 32-bit bus, an internal clock multiplier, and improved code-execution time to achieve four times the performance of the 900/H core. All of the TLCS-900 cores are instruction-set-compatible.

The TLCS-900 architecture centers on a flexible register set that you can configure for 8-, 16-, or 32-bit processing using a 16-bit ALU and datapaths. Toshiba designed the general-purpose register set for fast context switching, and you partition it into four register banks, each with four 32-bit registers, or eight register banks, each with eight 16-bit registers. The chip operates in minimum mode with a 16-bit program counter and registers or 32-bit maximum mode with 32-bit datapaths, a program counter, and registers.

The TLCS-900, with 300 to 400 instructions, is backward-compatible with the TLCS-90 but offers a substantial performance increase by using a three-stage pipeline with a 4-byte prefetch queue. The 32-bit maximum mode ac- commodates large-scale arithmetic and addressing (16 Mbytes) with a basic 16-bit CPU.

Configuring peripheral interrupts to bypass CPU interrupts enhances I/O processing. Instead, an I/O controller or special peripheral mDMA processor handles CPU interrupts. Using the I/O controller avoids the overhead of interrupt processing. Peripheral events trigger I/O-controller processing and "DMA" the data to or from memory and internal peripherals. The I/O controller handles as many as four mDMA channels. The CPU can execute from external memory and can dynamically shift bus sizes between 8 and 16 bits while running.

Power management: Idle mode shuts down the CPU, leaving all integrated peripherals active. Power-down, or stop, disables the oscillator. Any reset or interrupt request can terminate idle mode; only a hardware reset (nonmaskable interrupt and interrupt 0) can terminate power-down.

Special instructions: Bit-manipulation instructions include bit set, clear, change, test, search forward and reverse, and various logical operations. Math instructions include add, subtract, decimal adjust, signed and unsigned 8X8-bit and 16X16-bit multiply, signed and unsigned 16X8-bit divide, and shift 1 bit one to 16 times. The TLCS-900 also has a multiply-accumulate instruction and modulo increment/decrement instructions for circular-buffer pointers. It can also perform block moves and pattern searches in memory.

Special on-chip peripherals: Some members of the TLCS-900/H family contain a DRAM controller that operates with either 8- or 16-bit DRAMs. The DRAM controller supplies the control signals for refresh, read/write access control, and a row-column-address multiplexer. Toshiba's clock-gear function allows you to divide the operating frequency of the device by 2, 4, 8, or 16. You can dynamically change the clock gear to meet the instantaneous processing needs of the application.

Many of the TLCS-900 devices contain a pattern generator that comprises a 4-bit output port and the control logic to drive a stepper motor. The devices can also contain an LCD driver/controller that supports a 40Xfour-segment common. An integrated voltage-boost circuit generates the LCD voltages from the battery supply.

Development tools: Toshiba offers a real-time in-circuit emulator for the 16- and 32-bit versions of the TLCS-900 series. The emulator contains a controller that interfaces to a PC system through RS-232C or local-area-network con-nection. The emulator mimics the target microcontroller. For software support, Toshiba offers a software suite that comprises an assembler, a C compiler, a simulator, and an RTOS. In addition, Avocet Systems (www.2500ad.com) and others provide third-party support.

Second sources: There are no second sources for the TLCS-900.

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