September 24, 1998

EDN's 25th Annual Microprocessor/Microcontroller Directory

Motorola 68EC000
	View block diagram

The 68EC000, a base for the 680x0 and 683xx lines of 32-bit µPs, mixes 16- and 32-bit architectures. It has 32-bit registers for easy addressing, a 16-bit datapath and ALU to conserve silicon, and 16-bit instructions. Programmers get eight general-purpose, 32-bit data registers, which the CPU can address by bit, BCD, byte, word, or double word. In addition to user and supervisor stack pointers, 68EC000 chips have seven address registers. Other registers include the 32-bit program-counter and 16-bit status registers. The status register maintains status for the user and supervisor modes with ser and supervisor bytes. The 68EC000 implements user and supervisor modes in hardware, which eases having a control kernel or OS manage multiple application tasks.

The 68EC000 has microcode and second-level, expanded-nanocode microcode levels. Instruction execution triggers a chain of 10-bit microcode words. Each microcode word can reference another word, such as a jump in microcode or a string of 70-bit nanocode words that directly drive the CPU logic.

The CPU lacks a memory controller, but the separate address and data buses eliminate the need for buffering addresses. However, the CPU needs logic to generate the required DTACK* signal, which marks the successful completion of a memory cycle. An address decoder is necessary for multiple memory chips, and drivers may be necessary to buffer bus address and data lines. (Integrated versions of the 68EC000 contain this logic.) If DTACK* is late, the CPU generates wait states.

Power management: Only the integrated versions provide variations of sleep and low-power-stop modes.

Special instructions: The chip restricts privileged instructions—reset, stop, moves, and operations on the status register—to supervisor mode. To support user and supervisor modes, the hardware implements separate stacks and pushes and pops the program counter and status register onto the stack for exceptions. A link instruction lets you build link lists on private stacks. A special instruction lets you move as many as 16 registers to or from an effective address, including blocks of data registers to or from address registers.

Development tools: Green Hills Software (www.ghs.com) provides C, C++, Fortran, Pascal, and Ada compilers for the 68K architectures. This company also provides its Multi software-development environment for developing programs from these languages and mixing them into a single executable program in almost any combination. Hewlett-Packard (www.hp.com) offers logic analyzers, oscilloscopes, emulators/analyzers, software simulators, debugger/emulator software, a real-time software-performance analyzer, C compilers, assemblers, linkers, and a debugging utility for RTOSs. Huntsville Microsystems (www.hmi.com) supplies emulators, a $199 background-mode debugger (BMD), and simulators for Motorola devices. The company offers its HMI-200 Series and SPS-2000 Series emulators. Integrated Systems (www.isi.com), Microtec (www.microtec.com), and Microware (www.microware.com) provide RTOSs and a variety of other software tools to support hardware and software integration. Intermetrics (www.intermetrics.com) offers compilers, assemblers, utilities, debuggers, and royalty-free real-time kernels. Orion Instruments (www.yokogawa.com) offers in-circuit emulators and high-level-language source debuggers for Windows or Unix hosts. Software Development Systems (www.sdsi.com) provides C and C++ compilers; assemblers; simulators; debuggers for the target monitor, BDM, and JTAG; and interactive development and debugging environments. Wind River Systems (www.windriver.com) provides an RTOS, networking facilities, and a set of cross-development tools. Wind River also provides a diagnostic and analysis tool that provides visibility into the dynamic operation of an embedded system.

Second sources: Second sources of a few NMOS versions of the 68000 are Hitachi, Philips, and Toshiba.

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