September 24, 1998

EDN's 25th Annual Microprocessor/Microcontroller Directory

Intel i960
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The range of i960s runs from the new superscalar HA/HD/HT to the 16-bit SA/SB variants, including low-power versions of the i960 Jx series that operate at 3.3V. The i960 combines a von Neumann architecture with a load/store architecture that centers on a core of 32 32-bit general-purpose registers comprising 16 local and 16 global registers. An on-chip register cache automatically caches the local register sets to speed context switching. If the cache is full, the oldest cached set moves to memory, and the latest set caches. All i960s have multistage pipelines and use resource "scoreboarding" to track resource usage.

The i960CA provides superscalar operation and five pipeline stages. The key to the Cx is its four-instruction-wide instruction decoder, which decodes as many as four instructions per cycle. Current implementations dispatch as many as three of these instructions for execution. The i960CF has 128-bit-wide buses to move instructions to the decoder and 128-bit-wide buses to move data between the cache and registers.

Intel built the superscalar i960s around a six-port register file with register or memory-control execution units. These units include an integer unit, a floating-point unit, and an interrupt-control unit on the register side and address-generation and bus-controller units on the memory side. The i960s can cache instructions in a lockable cache; later versions add an instruction cache to supplement the register cache.

Intel based the i960Rx series I/O processors on the i960 Jx series processor core. The i960Rx processors target server-motherboard and adapter-card applications, in which the processors create an "intelligent" I/O subsystem. Intel and others have developed an intelligent I/O (I²O) specification to speed I/O processing and simplify driver development.

Special instructions: The i960 family has uninterruptible atomic add and modify instructions. Other instructions flush local registers and provide cache-locking control.

Development tools: More than 70 vendors support the i960 with a robust tool suite. These vendors offer a range of compilers, emulators, evaluation boards, debugging monitors, and real-time operating systems for the i960 family.

Second sources: There are no second sources for the i960 family.

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