September 24, 1998

EDN's 25th Annual Microprocessor/Microcontroller Directory

Motorola 68HC08
	View block diagram

The accumulator-based 68HC08 provides a code-compatible performance extension to the 68HC05 along with 78 new instructions. Although the CPU has only an 8-bit accumulator, the index register, stack pointer, and program counter are 16 bits. (The condition-code register is 8 bits.) The 68HC08 architecture can directly access a maximum of 64 kbytes and as much as 16 Mbytes using indexed addressing.

The 68HC08 has a standard internal bus, I-Bus, that promotes derivatives by easing the addition of peripheral modules. All peripherals are memory-mapped. The HC08 also includes the System Integration Module (SIM), which is analogous to the SIM built into all 683xx chips. The SIM incorporates bus-clock generation for the CPU and modules, a watchdog timer, and interrupt and reset control.

Power management: Wait mode discontinues CPU processing but leaves the clock, timer, serial peripheral interface, and serial communications interface enabled. Stop stops the clock and all internal processing. Both modes maintain RAM and enable an interrupt to wake the CPU. You can program and selectively turn off most peripherals.

Special instructions: The 68HC08's bit-manipulation instructions are set, clear, test, jump on bit set, or jump on bit clear. The CPU can test and branch on an interrupt bit, but branches are 5127 bytes relative to the program counter. Math functions include add, subtract, increment, decrement, multiply, divide, and decimal-adjust accumulate.

Development tools: Many third-party development tools are available for the 68HC08. These tools include compilers, source-level debuggers, a PC-based software simulator, production programmers, evaluation systems, and in-circuit emulators. Visit the Motorola Web site at http://sps.motorola.com/csic for a listing of available products.

Second sources: There are no second sources for the 68HC08.

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