September 24, 1998

EDN's 25th Annual Microprocessor/Microcontroller Directory

Toshiba TLCS-870
	View block diagram

The register-based architecture of the TLCS-870, 870X, and the newest 870/C Series uses memory mapping to access the devices' general-purpose registers. Each of the 16 register banks contains eight 8-bit registers, which you access in 8-bit or paired 16-bit units. You can also use each of the registers as an 8-bit accumulator or paired as a 16-bit accumulator using an 8-bit ALU and datapaths. The multiple register banks allow you to perform fast task switching and interrupt service. The µC also contains a 16-bit program counter, a hardware stack, and a 16-bit stack pointer.

The TLCS-870 Series has a simple instruction set with 1-byte- to 4-byte-long instructions. Common instructions have short object codes. In addition to the basic machine instructions, a relocatable macroassembler prepares expansion machine instructions to upgrade coding efficiency. Although only 41 types of mnemonics exist, the architecture supports 20 types of addressing modes. The TLCS-870 can address as much as 64 kbytes of internal memory, and the TLCS-870X can linearly address as much as 1 Mbyte of internal or external memory. To support this extended addressing, the TLCS-870X adds more memory-addressing modes. The TLCS-870X also uses a nonmultiplexed bus with bus-request/acknowledge and wait request.

TLCS-870 Series peripherals use a memory-mapped I/O system. You use special-function and data-buffer registers to perform peripheral control and data transfers.

Power management: Stop mode stops clock oscillation and puts the output ports in high impedance. Slow mode reduces power consumption by using the low-frequency clock. Idle and sleep modes stop the CPU clock but allow the peripherals to operate at various speeds. Software or external interrupts cause the device to exit idle and sleep modes. Some derivatives can also divide their internal clock by two, four, or eight. Toshiba designed the TLCS-870/C with optimized clock buffers, minimal clock-line length, a static-bus structure, and operation as low as 1.8V. Devices based on the 870/C core consume about one-third the power of the standard 870.

Special instructions: Bit-manipulation instructions include bit set, clear, complement, move, test, and exclusive. Math instructions include add, subtract, decimal adjust, signed and unsigned 8X8-bit multiply, and signed and unsigned 16X8-bit divide. Nibble manipulation includes swap and nibble rotation. The TLCS-870 also has 1-byte jump or subroutine call for short relative jumps and vector calls. The TLCS-870/C's instruction set is a subset of the TLCS-870, helping to reduce die size and, hence, power consumption.

Development tools: Toshiba provides a C compiler, a C-like compiler, an assembler, a source-level debugger, a DOS-based controller, and a real-time emulator for each derivative. The controller is common for all derivatives.

Second sources: There are no second sources for the TLCS-870 Series.

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