September 24, 1998

EDN's 25th Annual Microprocessor/Microcontroller Directory

Atmel AVR
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Atmel's 8-bit AVR RISC architecture, which was designed in Norway, includes a 16-bit, fixed-length instruction; a load/store architecture; and 32 general-purpose registers. The AVR also executes an instruction on every clock by prefetching an instruction during the previous instruction execution. Although Atmel sells many 8051s, the company claims that AVR is 10 times faster than the 8051, which requires four to 12 clocks per instruction.

AVR's 32 registers constitute the architecture's fast-access RISC register file and connect directly to the processor's ALU. The ALU supports arithmetic and logic functions between registers or between a constant and a register. The ALU also executes single-register operations. You can address the dual-mapped register file as part of the on-chip SRAM. Some µCs in the AVR product family feature a hardware multiplier in the arithmetic portion of the ALU. AVR uses a Harvard-style architecture and directly addresses as much as 8 Mbytes of program memory and 8 Mbytes of data memory.

Low-end versions of AVR without onboard RAM have a limited, four-level-deep, RAM-based hardware stack dedicated to subroutines and interrupts. Parts with onboard RAM have no hardware stack. The memory-mapped I/O space contains 64 addresses for CPU peripheral functions, such as control registers, timer/counters, and A/D converters.

Power management: The architecture supports idle and power-down modes. The idle mode stops the CPU while the registers, timer/counter, watchdog timer, and interrupt system continue to function. Power-down mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next external interrupt or hardware reset.

Special instructions: AVR supports approximately 120 instructions. Bit-manipulation instructions include bit set, clear, store, and load; some instructions can conditionally test bits in I/O space.

Special on-chip peripherals: You can use the AVR's serial peripheral interface to program the onboard flash memory.

Development tools: Atmel offers the AVR Studio software-debugging environment for simulation and real-time emulation. This tool, available from Atmel's Web site, contains an absolute assembler and is the front-end tool for the ICEPRO emulator. The AT90ICEPRO, which sells for $2495, supports current and future AVR devices. Atmel also sells the Flashlite evaluation board, which allows designers to program and run real-time code in an AVR device. This $49 board contains LEDs, headers, and buttons to allow users to evaluate and debug code. IAR Systems (www.iar.com) supplies an ANSI-compliant C compiler, a relocatable assembler, a linker, and a loader that support all AVR devices except for the AT90S1200.

Second sources: There are no second sources for the AVR architecture.

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