***********************************************
*                                             *
*  Main Routine  - Low Power Keypad Interface *
*                                             *
*  Program : KYEPAD.ASm                       *
*  Author  ; Lloyd D. Khuc                    *
*            Motorola Inc                     *
*  Date    : May-14-1998                      *
*                                             *
*                                             *
***********************************************

PORTA   equ  $00    ; Port A byte address
PORTB   equ  $01    ; Port B byte address
DDRA    equ  $04    ; Port A Data Direction
DDRB    equ  $05    ; Port B Data Direction
MOR     equ  $7F1   ; Mask Option Reg
EPROM   equ  $0300  ; Start of on chip ROM/EPROM
Vectors equ  $07F8  ; Start of Reset vectors
RESET   equ  $07FE  ; Reset Vector

**********************************************
*                                            *
*    MOR Bytes Definitions for Main Routine  *
*                                            *
**********************************************
      org  MOR
      db   $2A    ; disable Port A interrupts

**********************************************

        org rom      ;Starts at 0300
start:  clrx         ;

        lda #$F0     ;initial port A & B
        sta DDRA     ;
        lda #$3F     ;
        sta DDRB     ;

**********************************************
wait: lda #$00    ; reset all sw data
      sta PORTA   ;
b1:  lda #$01     ; apply col 1 = 1 by
     sta PORTB    ;
     jsr row
b2:  lda #$02     ; apply col 2 = 1 by
     sta PORTB    ;
     jsr row
b3:  lda #$04     ; apply col 3 = 1 by
     sta PORTB    ;
     jsr row
b4:  lda #$08     ; apply col 4 = 1 by
     sta PORTB    ;
     jsr row
     bra wait     ; 

row: lda PORTA   ; set row 0-3 = 0
     and #$0F    ;
     cmp #$01    ;
     beq  row1   ;
     cmp  #$02   ;
     beq  row2   ; go to check col
     coma
     cmp  #$fb   ;
     bne  row4   ;
     jmp  row3   ;

********************************************
row4: cmp  #$F7   ;
      bne  nokey  ; if no key press stay in
                  ; the wait loop
********************************************
col81: lda PORTB
       and #$0F
       cmp #$01    ; check sw on col = 1
       bne col82
       lda #$E8    ;
       jmp led

col82: cmp #$02    ; check sw on col = 2
       bne col84
       lda #$08    ;
       jmp led

col84: cmp #$04    ; check sw on col = 3
       bne col88
       lda #$F8    ;
       jmp led

col88: cmp #$08    ; check sw on col = 4
       lda #$D8    ;
       jmp led

*****************************************

nokey: rts

*****************************************

row1:
col11: lda PORTB
       and #$0F
       cmp #$01    ; check sw on col = 1
       bne col12
       lda #$11    ;
       jmp led

col12: cmp #$02    ; check sw on col = 2
       bne col14
       lda #$21    ;
       jmp led

col14: cmp #$04    ; check sw on col = 3
       bne col18
       lda #$31    ;
       jmp led

col18: cmp #$08    ; check sw on col = 4
       lda #$A1    ;
       jmp led

*****************************************
row2:
col21: lda PORTB
       and #$0F
       cmp #$01    ; check sw on col = 1
       bne col22
       lda #$42    ;
       jmp led

col22: cmp #$02    ; check sw on col = 2
       bne col24
       lda #$52    ;
       jmp led

col24: cmp #$04    ; check sw on col = 3
       bne col28
       lda #$62    ;
       jmp led

col28: cmp #$08    ; check sw on col = 4
       lda #$B2    ;
       jmp led

*****************************************
row3:
col41: lda PORTB
       and #$0F
       cmp #$01    ; check sw on col = 1
       bne col42
       lda #$74    ;
       jmp led

col42: cmp #$02    ; check sw on col = 2
       bne col44
       lda #$84    ;
       jmp led

col44: cmp #$04    ; check sw on col = 3
       bne col48
       lda #$94    ;
       jmp led

col48: cmp #$08    ; check sw on col = 4
       lda #$C4    ;

****************************************

led: sta PORTA
     bset 4,PORTB   ;

     ldx #$3
loop: decx
     bne loop
     bclr 4,PORTB   ;

     bset 5,PORTB   ;
     ldx #$B
loop2: decx
     bne loop2
     bclr 5,PORTB   ;
     jmp wait       ; go back to key entry

*******************************************
Delay:  ldx #$5   ; this delay for power up

Delay1: decx
        bne Delay1
        rts

        org $7fc
        dw  start