October 22, 1998

Bypassing PC boards: Thumb your nose at rules of thumb

Performance requirements should determine how you bypass power planes on multilayer pc boards. The classic technique, which relies on anecdotal rules of thumb, has simply outlived its usefulness.

Jeffrey S Pattavina, Intraplex Inc

The need for effective and efficient bypassing has grown as a consequence of shrinking power-supply voltages and expanding requirements for bypass networks that work from kilohertz to hundreds of mega-hertz. Bypassing strategies are often based on rules of thumb. Although such approaches may have worked in the past, they don't satisfy today's increasingly difficult requirements. To help you meet those requirements, this design feature:

• presents a technique that you can use to design a decoupling strategy that meets specific system requirements,
• makes you aware of such issues as parasitic elements and bypass components' imperfect nature,
• presents a means for accommodating larger pc boards' high-frequency behavior as 3-D transmission lines,
• provides an equivalent lumped-parameter model for the pc board, and
• identifies some pitfalls of arbitrarily applying rule-of-thumb design practices.

A typical power-supply output filter consists of a 330-µF electrolytic capacitor (Figure 1). Although the capacitor is not a particularly good choice because it provides poor decoupling above 1 MHz, it illustrates the crux of the decoupling problem: You have to work with nonideal components, and you must overcome the transmission-line effects of the "raw" pc board. Worked examples illustrate the concepts.

Modeling capacitors

A model for practical capacitors consists of a series-resonant circuit (Figure 2). The parasitic elements are the ESR and the ESL (equivalent series inductance). Table 1 provides measured data (the average of 10 units) for some typical surface-mount decoupling capacitors. In Figure 3's model for a typical surface-mount capacitor, you must add the inductance of the leads, H₁ and H₂, to the device's ESL.

Primarily because of their low ESR, ceramic capacitors are often regarded as superior at high frequencies to tantalum capacitors. However, for decoupling, you can use the tantalum capacitor's ESR to dampen the resonances that result from interaction between the capacitors' ESLs and the pc board's various capacitances. The high ESR acts as a built-in damping resistor and makes the tantalum capacitor a good choice for decoupling.

Figure 4 illustrates the primary difference between ceramic and tantalum capacitors. Notice the tantalum capacitor's relatively large resistive band compared with that of the ceramic device. As long as all of the decoupling capacitors have equal capacitance, the corner frequencies of the resistive band do not change as you change the number of parallel capacitors (Figure 5). In some cases, it is desirable to shift the frequency range of the resistive band. Figure 6 compares the impedance of a single 4.7-µF tantalum capacitor with that of 14 0.33-µF tantalum capacitors in parallel. Although their total capacitance is about the same as that of the single capacitor, the 14 capacitors have a resistive band that is higher in frequency.

Modeling pc boards

A pc board's power planes constitute a nonterminated, lossless, 3-D transmission line. With respect to power-supply (V_CC) decoupling, the pc board's transmission-line effects are significant in many cases, and you should consider them. Figure 7 shows the impedance of a 9X10X0.003-in. pc board.

Numerous resonance points characterize the transmission line. Of particular importance is the first resonance point at f₀. An equivalent series-resonant circuit approximates the pc-board impedance at frequencies as high as f₀ (Figure 8). Higher order models model the pc board to the second resonance point, f₁, and beyond. However, for most cases, modeling the pc board to f₀ is sufficient. For a 3-D pc board, C_S, the dc-transmission-line capacitance, is given by:

where e₀ is the permittivity of free space, e_R is the dielectric constant (also known as "relative permittivity"), and h is the board thickness in inches.

The ESL, L_S, is

To solve for L_S, you must determine the raw pc board's principal resonant frequency. This frequency is a function of the test point's location on the pc board. Equations for predicting the principal resonance at the center, side, and corner of a rectangular pc board have been determined empirically, and these equations follow.

and

The speed of propagation within the pc board, c_PCB, is independent of the dielectric thickness and is proportional to =e_R. Typical pc-board materials have an e_R of 4.6 to 4.8, so c_PCB;2.15 nsec/ft (versus ;1 nsec/ft in free space). Although c_PCB is independent of the board dimensions, Z₀, the characteristic impedance of the transmission paths within the board, depends strongly on the dielectric thickness and trace width.

For illustration, assume that the pc board has an area of 9X10 in., a dielectric thickness of 0.003 in., and a dielectric constant of 4.6. The worst-case (lowest frequency) principal resonance occurs when you look into a corner of the pc board. Therefore, from Equation 3, the principal resonance is:

From Equation 1, the total dc capacitance is:

And, from Equation 2, the ESL is:

Figure 9 shows the impedance of both the raw pc board and the equivalent LC model. As mentioned, the LC circuit approximates the pc board to f₀.

You can now construct the decoupling model (Figure 10). This model includes the power-supply capacitor, power-entry impedance, raw-pc-board parasitic circuit elements, and decoupling capacitors. The power-entry impedance is the impedance of the wiring between the power supply and the pc board's power planes. This impedance includes the series inductance of power feeds and jumpers. You can model the pc-board-mounted devices (ICs) as a current-noise source that drives the overall pc-board impedance. Therefore, the goal of the decoupling strategy is to keep the pc-board impedance low to minimize the induced noise voltage. Unfortunately, the noise-current spectrum is generally unknown. Therefore, predicting the exact impedance requirements is impossible.

To illustrate, assume that the impedance requirement at the pc board's power-entry point at the corner of the board (as described by Equation 4 in the previous example) is: Z_IN=0.1 Ohm from 10 kHz to 200 MHz. Recognizing that tantalum capacitors offer some advantage over ceramic capacitors for decoupling, you elect to use 15 4.7-µF tantalum capacitors. Figure 11, which ignores the power-entry impedance, Z_PE, shows the composite impedance of all of the parallel circuit elements as well as the individual impedances of the power-supply capacitor (330-µF electrolytic, Z_PS), the decoupling capacitors (15 4.7-µF tantalums, Z_BP), and the raw 9X10X0.003-in. pc board (Z_PCB).

The figure shows that the design meets the 0.1 Ohm goal over the required frequency range. The peaking that occurs near the pc board's principal resonance is the result of the bypass capacitors' ESL intersecting with the pc board's capacitance. (That is, at the resonant frequency, the magnitude of the ESL's inductive reactance equals that of the pc board's capacitive reactance.) The tantalum capacitors' resistive band effectively dampens this resonance.

Maximum power-entry inductance

You must still determine the maximum allowable power-entry inductance. In many cases, adding an inductance improves the bilateral isolation (that is, isolation in both directions) between the power distribution and the power planes. The largest power-entry inductance provides the greatest isolation. You cannot make this value arbitrarily large, however. To minimize peaking, the value must be small enough that the power-entry impedance intersects the decoupling-capacitor impedance in the resistive (real) band. The inductance that intersects the corner of the resistive band is the "corner inductance."

For this example, the corner inductance is L_CORNER=800 nH (Figure 12). The power-entry inductance ratio, k, is the ratio of the corner inductance to the actual power-entry inductance, k=L_CORNER/L_PE. Figure 13 shows the voltage-transfer functions from the power supply to the pc board for various inductance ratios. Peaking in the transfer function occurs between 10 and 400 kHz. This range is typical for the power supply's switching frequency. Therefore, any peaking in the transfer function could increase the power-supply ripple that the pc board sees. To keep the peaking relatively low (less than 2 dB), k should be no less than 10. For this example, if k=10, the maximum power-entry inductance is: L_PE=L_CORNER/10=800 nH/10=80 nH.

For k=10, the voltage-transfer function from the pc board to the power supply appears in Figure 14. For this example, the power supply is isolated from the pc board for frequencies greater than 200 kHz. The isolation is especially important when a power supply connects to more than one pc board. In this case, it is desirable to keep the noise of each pc board from feeding back onto the distribution bus.

At this point, the decoupling model is complete. A plot shows the composite impedance for the power-supply, power-entry, and bypass elements and for the pc board (Figure 15). The 15 4.7-µF tantalum capacitors meet the 0.1 Ohm design requirements from 8 kHz to 200 MHz.

For decoupling, it is generally best to use the smallest practical pc-board dielectric thickness. To illustrate, consider increasing the dielectric thickness from h=0.003 in. to h=0.03 in. The change decreases the pc-board capacitance by a factor of 10 but also increases the pc-board inductance by a factor of 10. Because the capacitance decreases by the same amount that the inductance increases, the principal resonance remains unchanged. In other words, the principal resonance is a function of the dielectric constant and the surface area of the pc board, but not of the dielectric thickness. Figure 16 shows the composite impedance for the power supply, power entry, and 15 4.7-µF tantalum decoupling capacitors. Curves show the impedance for h=0.03 in. and h=0.003 in. With h=0.03 in., decoupling degrades (impedance increases) near the principal resonance. As the pc board's dimensions increase, the principal resonance decreases in frequency (moves to the left). Therefore, for very large pc boards, the raw pc-board effects are more significant.

Pitfalls of rule-of-thumb design

The following example illustrates some of the pitfalls of using the rule-of-thumb approach. In particular, it is common to "sprinkle" ceramic capacitors around the board. Typically, this approach calls for a 0.1- or 0.01-µF ceramic capacitor for each IC. Following this rule, assume there are 45 0.1-µF ceramic capacitors for the 9X10X0.003-in. pc board described earlier.

Figure 17 compares the design approach in the previous section with the rule-of-thumb approach. The decoupling-by-rule-of-thumb design does not meet the specified requirement (0.1 Ohm from 10 kHz to 200 MHz). Decoupling is worst at two frequencies: when the reactance magnitude of the power-entry inductance equals that of the decoupling capacitors and when the reactance magnitude of the decoupling capacitors' ESL equals that of the pc-board capacitance.

References

1. Johnson, Howard W and M Graham, High-Speed Digital Design, Prentice-Hall, 1993.
2. Coombs, CF, Printed-Circuit Handbook, Third Edition, McGraw-Hill, 1988.

Author's biography

Jeffrey Pattavina is director of technology for Intraplex Inc (Middletown, CT), where he develops new technologies and products. He holds a BSEE from the University of Massachusetts—Amherst and an MSEE from Northeastern University (Boston). In previous jobs, he worked on many wire-line communication products and technologies, including integrated-services digital networks and HDSL.

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