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11.05.98

Overvoltage tolerance eases the transition between 5 and less-than-5V systems

In a perfect world, all systems would run on the same supply voltage. In the real world, the supply voltage is constantly changing. An overvoltage-tolerant device makes the transition to different supply systems and subsystems a little less painful.

Craig Klem and Lee Sledjeski, Fairchild Semiconductor

According to Webster, tolerance is the relative capacity of an organism to thrive when subjected to unfavorable environmental conditions. Extending the definition and context to ICs, overvoltage tolerance is the ability of an IC to withstand—with negligible leakage current— any voltage excursion on its input or output pins that exceeds its current supply voltage.

ICs with overvoltage tolerance can resolve a number of board- and system-design roadblocks. As a design evolves, designers typically add system functionality and repartition hardware and software and use the latest levels of circuit integration and technology. This design activity inevitably results in the need to combine devices with different supply-voltage requirements (see sidebar "Review the interface standards"). The combination of older, higher V_CC technologies with devices of newer, lower V_CC technologies requires some interdevice translation capability.

You can interpret translation capability as the ability of a device to take a received signal and resize it for the next receiver. This capability can also simply mean that the I/O structures of a device need to withstand voltage levels higher than the value of their V_CC. In either case, a conscious design effort must address the signal- and V_CC-level mismatches.

You can gauge the performance of a device's overvoltage tolerance in a number of ways. The standardized leakage specifications of low-level input current (I_IL), high-level input current (I_IH), output three-state current (I_OZ), three-state input or output power-off leakage current (I_OFF), and a few parameters in the absolute-maximum-ratings section of a device's data sheet define the overvoltage-tolerance characteristics. Based on the I_IL, I_IH, and I_OZ performance specifications, you can combine ICs that cross V_CC supply voltages. For applications that require powering off subcircuits or sections of a system, the I_OFF leakage specification can provide a measure of system protection and double as a power-savings feature. Combining these specifications results in a design that's conducive to mixed voltage and powered-down operation within the IC manufacturer's intended range of operation.

SPECIFICATIONS DETERMINE OVERVOLTAGE

One of the best tests for overvoltage tolerance, I_OFF specifies the leakage current when forcing a device input, three-state output, or I/O pin from 0 to 5.5V when V_CC is 0.0V (Figure 1). When interfacing with devices that operate at different V_CC levels, I_OFF describes a worst-case measurement for which a powered-off device with a V_CC of 0V does not adversely affect an active device with a V_CC of 5.5V.

The I_OZ, I_IL, I_IH leakage performance of an overvoltage-tolerant device is similar to that of the same device in the I_OFF state. The only differences are that the tests for the I_OZ, I_IL, I_IH specifications keep V_CC within the recommended operating range and disable the enable control to keep the input or output of a device in a high-impedance state.

You can also recognize an overvoltage-tolerant device by its absolute-maximum-ratings specification. If the input's or output's maximum voltage rating is V_CC+0.5V versus a value of 6V for JESD36-compatible, 5V-tolerant products or 4.1V for JESD64-compatible, 3.6V-tolerant products, then the device is not overvoltage-tolerant. The key difference is the specification of an absolute voltage capability at the input or output pins without reference to the IC's supply voltage.

CONSIDER SYSTEM-LEVEL EXAMPLES

With an understanding of overvoltage tolerance at the specification level, you can explore potential uses in system applications, which include those that require input overvoltage tolerance, mixed-voltage operation, and bidirectional level shifting. Segmenting overvoltage-tolerant devices into categories helps to keep track of multiple device types and to properly apply them to system applications. The types of devices are those that offer only input overvoltage-tolerance, those that offer both input and output overvoltage tolerance, and those that offer dual-supply level shifting.

The latest PC specification using Intel's BX motherboard (http:// developer.intel.com/design/pcisets/) and 400-MHz processors has several overvoltage-tolerance applications. ISA legacy signals must route into the Slot 1 processor module (Figure 2). The ISA signals are still at 5V levels, and the system must translate these levels down to 2.5V levels to avoid destruction of an expensive µP module.

A mixed-voltage application requires overvoltage tolerance to minimize the impact on the receiver from possible signal levels higher than the receiver's supply level (Figure 3). The leakage on a three-state I/O pin of an overvoltage-tolerant device is less than 10 µA. Extending the application to a multicard telecomm backplane with a powered-down card shows the inherent value of an overvoltage-tolerant IC. You can reduce power to 0V to the left card for removal and inspection while the system remains online (Figure 4). Thus, devices supporting the I_OFF specification are well- suited to this application.

Another option for handling a multi-V_CC interface is to use a bidirectional, dual-supply-voltage translator (Figure 5). This device performs true step-up/step-down signal-level voltage translation, depending on the direction of data travel. Overvoltage tolerance is unnecessary because of the dual supplies. In this example, the 3V signals interface with the 3V V_CCA side, and 5V signals interface with the 5V V_CCB side. Because a 5V supply powers the 5V outputs, these outputs can tolerate 5V signals and can pull up to 5V in their high state and vice versa. Internally, these translators perform a controlled voltage translation between V_CCA and V_CCB.

TABLE RECOMMENDS INTERFACE

Identifying a suitable interface in the system architecture eases the transition to a new supply voltage and lets you keep legacy supply voltages. After identifying the signal levels and supply voltages on both sides of a multisupply interface, you can base your decision on input and output overvoltage protection that either the driver or the receiver provides (Table 1). To use the table, identify the driver-supply voltage and signal level, and then cross-reference them with the receiver-supply voltage and signal level. In some cases, the table recommends a different receiver-device type over a direct interface. For bidirectional applications, consider both directions for optimal interface performance and reliability. In systems that use lower supply voltages, replace the 5V value with the higher of the two interfacing voltages, and replace the 3V value with the lower voltage.

REVIEW THE INTERFACE STANDARDS

The Joint Electron Device Engineering Council (JEDEC) committees have defined the operating-voltage classes that the industry uses for IC development and to determine overvoltage-tolerance requirements (Figure A). The committees defined the classes based on process road maps and the voltage requirements and limitations of submicron semiconductor structures.

Each class includes a division of normal and wide-range operation to accommodate IC-manufacturing supply-voltage constraints. The standards usually specify the normal ranges of V_CC with a tolerance of 5 or 10%. The wide-range specifications help accommodate adjoining supply classes, reduce supply regulation requirements on battery-powered systems, and provide additional flexibility for the system designer.

The standards include traditional operating-voltage classes for 5V ICs. CMOS-logic products, such as FACT and HCMOS, have specifications for supply voltages of 2 to 5.5V. Many new products operate at 3.3V, whereas the overall subsystem operates at 5V. Also, some system-design leaders are developing 2.5V subsystems to take advantage of improved semiconductor process density and speed and lower noise. Although the standards define 1.8V supply operation for all but a few leading-edge products, this specification merely forecasts the trend in system design for reducing supply-voltage levels.

The mixed-voltage standards have become an area of focus for many logic suppliers (Figure B). This focus is all part of standard logic's changing role in many system designs. Although many designs integrate digital functions in system-on-chip products, a logic device's ability to concurrently interface across multiple I/O standards is a function in itself in tightly coupled system designs.

Authors' biographies

Craig Klem is a staff application engineer at Fairchild Semi- conductor (South Portland, ME, www.fairchildsemi.com), where he has primary responsibility for low-voltage and GTLP products. He has a BS in microelectronics from Rochester Institute of Technology (Rochester, NY).

Lee Sledjeski is a senior application engineer at Fairchild Semiconductor (South Portland, ME, www.fairchildsemi.com) with primary responsibility for low-voltage logic. He has a BSEE from the University of Connecticut (Storrs, CT).

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