Enhancements fine-tune FIFOs

By Brian Dipert

Integrated Device Technology's (IDT's) SuperSync II FIFO buffers (Picture) provide more features, lower power consumption, and higher speed than the company's SuperSync products. Both SuperSync and SuperSync II devices offer 128-kbit to 4-Mbit densities. SuperSync II performance extends to 133 MHz, however, and operating current is as low as 35 mA for narrow-bus configurations. SuperSync II 3.3V inputs are 5V-tolerant. Flexible bus matching gives you the option of running each port at X9- or X18-bit wide buses.

Other enhancements include user-selectable asynchronous or synchronous flag-timing modes, zero-latency retransmit, eight pin-configurable default threshold levels for almost-empty and -full flags, big- and little-endian byte representation, and noninterspersed parity control. All SuperSync II FIFO buffers come in 80-lead TQFPs and in 7.5-, 10-, and 15-nsec speeds. Available for sampling now, the devices will enter volume production in January with prices ranging from $34.70 to $91.60 (10,000).

Integrated Device Technology Inc, Santa Clara, CA. 1-408-727-6116, fax 1-408-492-8674, www.idt.com. Circle No. 382

Two chips implement complete ADSL modem

The MTK-20140 ADSL DynaMiTe chip set lets you design an ADSL modem with only two ICs. One chip, the MTC-20144 contains an analog front end; the other, the MTC-20146, provides the necessary digital functions. Together, they implement discrete-multitone (DMT) and asynchronous-transfer-mode (ATM) functions and an embedded controller.

The DynaMiTe chip set is ANSI Issue 2-compliant and provides direct ATM support (Utopia interface). It allows broadband connections to 26,000 ft on #24 AWG wires and to 18,000 ft on #26 AWG wires. It enables full-rate ADSL transfers as fast as 8 Mbps on downlinks and 850 kbps on uplinks. The chip set features software extensions to G.Lite and G.DMT, including ISDN support. In volume, the chip set costs $50.—by Gary Legg

Alcatel Microelectronics, Zaventem, Belgium. +32-2-718-1837, fax 32-2-718-1999, www.alcatel.com. Circle No. 383

Low-power imperative drives 12-bit A/D converters

A broadly applicable A/D converter must have low power, low price, and high performance. Two new devices—the 1.75M-sample/sec AD7472 from Analog Devices (Picture) and the 20M-sample/sec SPT7935 from Signal Processing Technologies (Picture)—exemplify that trio of parameters.

The AD7472 operates from a 2.7 to 5.25V supply and requires 1 mA from a 3V rail. You can reduce its dissipation by running the successive-approximation-register-based converter at lower speeds if your application does not need maximum throughput rate in all situations. The converter has 20-MHz full-power bandwidth and includes a track/hold amplifier; overall SNR exceeds 70 dB for a 500 kHz input. The 24-lead IC, which requires an external reference, costs $6.65 (1000); a 10-bit version, the pin-compatible AD7470, costs $4.50.

If your low-power-conversion needs are in the mid- to high-speed range, the SPT7935 operates from a 3.3V supply with typical power dissipation of 79 mW. Like the Analog Devices' converter, this device includes a track/hold amplifier. With a 4.4995-MHz input, its typical SNR and spurious-free dynamic range are 60 dB; corresponding specifications with an 18.991-MHz input are 58 and 57 dB, respectively. You can get the 44-lead IC for $9.90 (1000).—by Bill Schweber

Analog Devices Inc, Norwood, MA. 1-781-937-1428, fax 1-781-821-4273, www.analog.com. Circle No. 384

Signal Processing Technologies Inc, Colorado Springs, CO. 1-719-528-2300, fax 1-719-528-2370, www.spt.com. Circle No. 385

MINIATURE SOLENOIDS MAKE BATTERIES HAPPY

The latching SCL1330 and nonlatching SCN1330 miniature C-frame pull solenoids from Bicron (Picture) are 15% more efficient than other available devices, according to the company. The increased efficiency suits the solenoid for battery-powered applications. Four AA cells in series for 6V can power more than 250,000 solenoid actuations. A short electrical pulse actuates the plunger of the SCL1330 latching model; a built-in magnet then holds the plunger in the retracted position. A pulse of the opposite polarity releases the plunger. In the SCN nonlatching model, a continuous current holds the plunger in; the plunger retracts upon removal of the current. The solenoids are available with 3, 6, 12, or 24V coil-voltage ratings and cost less than $2 (OEM).—by Bill Travis

Bicron Electronics Co, Canaan, CT. 1-860-824-5125, fax 1-860-824-1137, www.bcrn.com. Circle No. 387

Start-up reveals C-programmable VLIW architecture

Since early this year, Equator Technologies has been one of two media-processor start-ups planning a parallel µP architecture (see "Media processors target digital-video roles," EDN, Sept 1, 1998, pg 59). The company has finally unveiled its very-long-instruction-word (VLIW) architecture that targets applications including digital TV, set-top boxes, 3-D games, digital versatile disks, image-processing equipment, communication devices, and others. Equator presents its new MAP1000 processor as a sort of super DSP that's fully programmable with C, even for known-problematic algorithms, such as MPEG-2 encoding and decoding. The company claims that the processor offers at least four times better performance than a TI (www.ti.com) C60 DSP and 10 times better perform-ance than a 300-MHz Pentium II. Furthermore, Equator claims the performance advantage can double in some applications.

The IC includes a processor block that can launch and complete four 32-bit, fixed-point instructions per clock, yielding 800 MIPS at 200 MHz on simple instructions. A Data-Streamer coprocessor augments the main processor block and optimizes the data movement that's key to handling rich video streams. Yet another variable-length, decoding/encoding coprocessor handles Huffman coding for MPEG-2 yet is also reprogrammable. The only component that is mostly hardwired is a small 3-D graphics block. The IC also sports a host of multimedia-capable I/O devices, including a 230-MHz RAMDAC; NTSC/PAL in and out; multiple audio interfaces; and dual PCI buses, including one Accelerated Graphics Port master.

Like most media-processor vendors, Equator believes that the ability of its processor to handle multiple functions, such as 3-D gaming and high-definition TV {HDTV), will endear the architecture to manufacturers of consumer electronics. Still, the success of any media processor ultimately hinges on how it compares pricewise in a single-function device with fixed-function designs. Equator claims that its processor achieves cost parity with fixed-function implementations in areas such as digital TV, HDTV, and digital set-top boxes. Moreover, the company claims life-cycle analysis will clearly reveal the advantage of its programmable approach: You can upgrade deployed systems in the field.

Equator plans to support the MAP1000 both as a stand-alone processor and as a coprocessor in PCs while the industry struggles with the PC-based-versus-TV-centric living-room argument. The IC costs $600 (1000), but it requires little else other than RAM in most applications. Equator has developed a pair of PCI-based reference designs that demonstrates most significant applications and that sells for $6333 per set. It also offers the comprehensive, $12,000 imMediaTools software-development environment. Hitachi (www.hitachi.co.jp) has signed on as a manufacturing partner and also has rights to market the MAP1000. Samples are available now, and production will follow in the first quarter of 1999.—by Maury Wright

Equator Technologies, Campbell, CA. 1-408-369-5200, www.equator.com. Circle No. 388

Chip set increases backplane bandwidth

The Cross-Stream chip set provides switching on high-bandwidth data backplanes at 32 Gbps in a minimal configuration and at hundreds of gigabits per second in parallel implementations of multiple chip sets. Those specs provide faster switching and greater scalability, says manufacturer Vitesse, than is possible with switch ICs that use either shared-memory or asynchronous or parallel switch fabrics.

The key to both faster switching and greater scalability is serial, synchronous operation. SRAM bus width and access times limit shared-mem- ory switches to about 20 Gbps. Parallel crosspoint architectures offer higher capacity but require several high-pin-count ICs. In contrast, Cross-Stream implements an aggregate 32-Gbps switch in a single IC, and you can gang chips for higher overall rates. Each Cross-Stream chip set includes the VSC880, a 16X16-bit, 2-Gbps serial switch-fabric IC, and the VSC870, an associated 2-Gbps synchronous serial transceiver. The VSC870 synchronizes to a central clock on the VSC880, eliminating the duty-cycle variations and data dependencies seen in asynchronous-switch design.

The Cross-Stream chip pair can switch self-routing, variable-length-packet, or fixed-length cells, making it useful for datacomm applications that include Gigabit Ethernet, asynchronous transfer mode, Internet Protocol, or Fibre Channel. The chips will be available for sampling in early 1999. The VSC870 transceiver will sell for $69, and the VSC880 switch will sell for $250 (1000).—by Gary Legg

Vitesse Semiconductor, Camarillo, CA. 1-805-388-3700, fax 1-805-987-5896, www.vitesse.com. Circle No. 390

Low-impedance backplane promises 1000-Mbyte/sec VME

Adding to the uncertainty of VME-board manufacturers, another proposal has surfaced to increase bus data rates. Trenew Electronic GmbH has developed a low-impedance technique that boosts VME backplane rates to 1000 Mbytes/sec.

Unlike the yet-to-be-approved VME320 approach from Arizona Digital (www.arizonadigital.com) and Bustronic (www.bustronic.com), which requires a patented, star-pattern backplane, the new VME1000 proposal from Trenew works over a traditional slot-to-slot backplane. The basis of the VME1000 concept is to reduce the backplane transmission-line equivalent impedance from 50 to 20 Ohm to minimize bus transition times. Ringing and reflections generated by the fast edges dissipate before the next signal edge arrives. VME1000 also takes advantage of the proposed source-synchronous transfer protocol, which reduces the handshaking from four to two edges.

The limiting factor of very fast backplane data rates is the skew of data and strobe signals. Trenew proposes the use of enhanced-transceiver-logic drivers, which the VME International Trade Association (www.vita.com) is considering, to minimize skew and to drive the low backplane impedance. Terminating each unused slot with a standard resistance also decreases skew.

As board manufacturers wait for industry agreement on the next step in the VMEbus data protocol, no mad rush to certify VME1000 will likely occur. Most power users prefer to implement high-speed point-to-point datapaths than to rely on the speed of the time-shared VMEbus.—by Warren Webb

Trenew Electronic GmbH, Pforzheim, Germany, +49-7231-9734-0, www.trenew.com. Circle No. 391

RADICAL TECHNIQUE CLAIMS TO PUMP 90 GBPS THROUGH 100-KM FIBER

Fiber offers you truly impressive potential bandwidth, and you can already get 10 to 40 Gbps data rates using dense-wavelength-division multiplexing (DWDM) and optical amplifiers. Now, SilkRoad has demonstrated what it calls "refractive synchronization," a proprietary technology that delivers almost 100 Gbps; the company claims that the technology has achieved twice that rate in the lab. At a New York press conference, the company connected 144 TV signals, along with other data and voice, to their corresponding monitors using a single fiber link.

The technique differs significantly from DWDM in that SilkRoad uses one optical wavelength for all the data (see "Optical amplifiers literally pump up the (photon) volume," EDN, July 16, 1998, pg 40). While injecting the laser-generated photons into the optical fiber, the method optically narrows and modulates the photon beam and then embeds frequency-ID tags onto the photon signal. The receiver circuitry matches each tag with a corresponding channel to retrieve the data. The approach needs only simple beam splitters in contrast to the optical multiplexers/demultiplexers and amplifiers of DWDM. The company plans to announce commercial products next year.—by Bill Schweber

SilkRoad Inc, San Diego, CA. 1-619-457-6767, fax 1-619-457-6751, www.silkroadcorp.com. Circle No. 392

Complex PLD cuts transistor count, die size

Not content with offering laser-configured versions of Altera's (www.altera.com) Flex8000 programmable logic, Clear Logic is extending its product line to pursue more lucrative (but also more nimble) prey: Altera's MAX7000 CPLDs (see "Quick FPGA conversion without NRE charges," EDN, Jan 15, 1998, pg 15). Clear Logic claims that its CL7000 laser-processed logic devices (LPLDs) eliminate as many as 1 million transistors from the equivalent Altera CPLD (macrocell-count- dependent), shrinking die size from 40 to 60% on a comparable process technology generation.

How does Clear Logic achieve such aggressive goals? Unlike the Flex8000 product line, Max7000 CPLDs contain no silicon-intensive SRAM configuration elements that Clear Logic could replace with comparatively svelte laser-trimmable fuses. However, the company still finds three optimization areas: the programmable interconnect array, the product-term AND array, and high-voltage circuits. Clear Logic replaces each 11-transistor programmable-interconnect-array element with a single-fuse counterpart and each six-transistor AND array element with a one-transistor, three-fuse alternative. Because CL7000 LPLDs aren't in-system- or PROM-programmer-configurable, the devices also need no internal high-voltage pumps.

Clear Logic also claims that its laser-fuse approach reduces bit-line capacitance as much as 40%, translating to faster internal signal-propagation delays and lower power consumption. The company provides CL7000 prototypes within two weeks of receiving your bit-stream file or an already-programmed Max7000 device and can supply production volumes within a month. Clear Logic targets LPLD costs 20 to 50% lower than that of the Altera counterparts, and, assuming that it can evade the wrath of Altera's legal department, will ship its first CL7000 devices in the first quarter of 1999.—by Brian Dipert

Clear Logic, Inc, Santa Clara, CA. 1-408-361-2600, fax 1-408-361-2666, www.clear-logic.com. Circle No. 394

ICs keep RF link simple for wireless control

Cellular phones may be the most visible edge of wireless' influence, but many other subtle wireless applications, such as keyless entry and remote control, are increasingly common. Using Temic Semiconductor's U2741B transmitter, U3741BM receiver, and 4-bit M44C890 microcontroller as a data encoder/decoder, you can build a link operating at 300 to 450 MHz and supporting data rates as high as 10 kbps. The ICs operate at approximately 1-mA currents for the receiver and microcontroller, are compact, require few external components, and can use a very simple antenna.

Employing amplitude-shift-keying or frequency-shift-keying (FSK) modulation, the transmitter with its single-ended open-collector output pushes as much as 2 mW into a magnetic loop or quarter-wavelength antenna. You can operate the transmitter and encoder from a 2 to 5.5V supply, meaning that a single Li-ion cell is sufficient. If you use FSK modulation, the transmitter pulls the reference crystal up to 5100 ppm for larger, more noise-resistant frequency deviations. This $1.20 (1000), 16-pin IC requires no SAW filter.

The 20-pin receiver needs no RF components, except for antenna matching. It operates from a 4.5 to 5.5V supply with a single-ended RF input that uses either discrete or pc-board-integrated antennas. The $3 (1000) receiver includes the requisite low-noise amplifier, an IF amp, a PLL, a VCO, and a crystal interface. Antenna matching and filtering may require a SAW filter in the front end. The receiver consumes less than 1 mA because of its programmable polling operating mode; in sleep mode, it needs just 200 µA.—by Bill Schweber

Temic Semiconductors, subsidiary of Atmel Corp, www.temic-semi.de. Circle No. 389

2.4-GHz wireless LAN pushes PC links beyond 10 Mbps

Wireless-link throughput that is far lower than you usually get from your wired links can temper the joys of roaming with your PC. Using Aironet Wireless Communications' LAN adapters and their corresponding access point as the bridge between a wired-LAN backbone and the wireless points, though, you can quickly configure a wireless LAN with data rates as high as 11 Mbps. The system (Picture) operates in the unlicensed 2.4-GHz band using direct-sequence spread-spectrum (DSSS) technology; range is typically 500 ft outdoors and 100 ft indoors at maximum data rate and 1800 ft outdoors, 350 ft indoors at 1 Mbps.

The PC4800 Turbo DS LAN adapters come in Type II PCMCIA cards and support IEEE 802.11 in their 1- and 2-Mbps modes. These $795 cards include barely noticeable snap-on "diversity" antennas, power-management software that cuts battery drain to 30 mA—from 550 mA in transmitting mode and 330 mA in receiving mode—with typical duty-cycle and data rates, and Windows and Novell device driv-ers. Output power is 100, 50, and 10 mW/MHz for US/ Canadian, European, and Japanese use, respectively. The system includes automatic data-rate switching to a slower rate as you reach the fringe of the cell coverage.

The LAN adapters link via AP4800 Turbo DS wireless access points, which support Ethernet or token-ring topologies. You can remotely manage these $1995 points from any network port using Telnet or a Web browser. Like the LAN adapters, the access points use diversity antennas for improved SNR and bit-error rate, despite roaming users and multipath signals. Transmitted power is the same as for the LAN adapters; the access points operate from an ac line adapter or 12V dc/1.5A.

Aironet packages this DSSS technology in its BR510 series of wireless bridges for applications involving linking buildings on a compus. These $3695 bridges yield point-to-point/ multipoint, fixed-path links with a range as large as 15 miles (24 km) yet at lower power levels than the roaming nodes when you use one of Aironet's high-gain dish or Yagi antennas.—by Bill Schweber

Aironet Wireless Communications, Akron, OH. 1-330-664-7900, www.aironet.com. Circle No. 395

Modular LAN-switch IC family scales from workgroup to enterprise

Ethernet switching continues to heat up as even small workgroups need the bandwidth a switch affords, leaving equipment vendors needing to address a broadening market. Small offices and workgroups need and can afford only a so-called unmanaged switch, whereas larger organizations require enterprisewide LAN management and want to buy only extensible product families. Most Ethernet-switch-IC vendors have addressed the market with products for different segments, but Vertex Networks has devised its XpressFlow 2080 family with modular compatible products that you can combine or use individually to support all segments.

For example, its baseline DS212 IC supports 12 Fast Ethernet ports and one Gigabit Ethernet port and requires only external EPROM and RAM to implement an unmanaged switch. Alternatively, you can add a microcontroller for management functions. You can also extend the IC into distributed-switching applications because it supports the company's 3.2-Gbps XpressFlow Pipe. The proprietary interface can connect switch ICs in ring configurations or to a switch fabric, such as the company's SF240 or SF280, with four and eight XpressFlow Pipe connections, respectively. The fabrics can each handle an aggregate bandwidth of 25.6 Gbps, and you can cascade two fabrics. In total, the family includes four multiport front ends with varying support for different mixes of Fast and Gigabit Ethernet and asynchronous transfer mode, as well as different XpressFlow Pipe configurations. At the high end, you can easily configure a 96-port, Fast Ethernet, Layer 3 routing switch. The company claims that the silicon bill-of-materials cost for an unmanaged Layer 2 switch will be less than $5 per port and that of a similar Layer 3 switch will be $9 per port.—by Maury Wright

Vertex Networks, Irvine, CA. 1-949-252-8880, www.vertex-networks.com. Circle No. 396

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