EDN’s 20th annual Innovation Awards Finalists
-- EDN, February 18, 2010
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&& PREVIOUS FINALIST | MAIN | NEXT FINALIST >> Category: EDA: Back-End Tools Finalist: Quartus II Version 9.1 FPGA-design tool, Altera  Quartus II v9.1 extends the Quartus II productivity advantage by delivering 20 percent overall compile time reduction over v9.0 while maintaining 2x to 3x faster compile times than the nearest competitor for high-density 65-nm and 40-nm designs. Version 9.1 includes several enhancements to help designers reach timing closure faster. The release also supports Altera's newly announced Cyclone IV FPGAs and the Stratix IV E EP4SE820 FPGA, the largest FPGA in the industry. The new Rapid Recompile feature permits faster small ECO-type design changes, reducing compilation times by 50 percent on average for a recompile versus running another full compile on the design, while preserving critical timing during late design changes. Quartus II software is the only FPGA design software that performs parallel processing in all synthesis, place-and-route, static timing analysis, and assembler design stages. In the version 9.1 release, new parallel synthesis support significantly reduces synthesis time for designs with partitions. Version 9.1 delivers an enhanced timing-driven synthesis feature, enabling you to improve design performance in 10 percent less compile time than the previous versions. Often most timing-closure work goes into one or two critical blocks. Version 9.1's incremental compile feature allows you make changes and compile just the critical blocks until timing is closed, reducing your compilation times by up to 70 percent compared to a flat compile. Version 9.1 adds more flexibility to close timing and optimize your design with partitions. |
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