Intel, Micron intro 25-nm NAND
Analysts believe the flash will allow the companies to profit more than their competition.
By Suzanne Deffree, Managing Editor, News -- EDN, February 1, 2010
Intel Corp and Micron Technology Inc today officially announced first 25-nm NAND technology, targeting the storage at high-performance class of SSDs (solid-state drives) and the general consumer electronics industry.
The 25-nm process -- manufactured by IM Flash Technologies (IMFT), Intel and Micron’s NAND flash joint venture -- produces 8-GB of storage in a single NAND device measuring 167mm-sq. For consumer electronics manufacturers, the device provides density in a single 2-bits-per-cell MLC (multi-level cell) die that will fit an industry-standard, TSOP (thin small-outline package).
Intel and Micron were quick to point out that they have doubled NAND density roughly every 18 months. IMFT moved on a 50-nm process in summer 2006, followed by a 34-nm process in spring 2008, and now followed by today’s winter 2010 25-nm process announcement. Other leading NAND makers have recently announced memory processes ranging from 32 nm to 26 nm.
“At a die size of 167-mm-sq a 300-mm fab should be able to manufacture just over 400 die per wafer,” Jim Handy, an analyst with Objective Analysis, reported. “This gives a manufacturing cost of about $4.00 per chip, or $0.50/GB. Compare this to a more common 45-nm MLC NAND on a 300-mm line, which should cost about $1.75/GB. Since the price of NAND flash has been hovering around $2.00/GB for the past year, and seems poised to continue at that price through 2010, the [Intel-Micron] 25-nm process will give the companies a significant margin boost over their current 34-nm chip, whose cost we estimate at $1.00/GB.
“Not only will this new process allow Micron and Intel to profit more than their competition, but it also allows them to squeeze more gigabyte production out of their Lehi [Utah] and Manassas [Virginia] lines before having to equip their new fab in Singapore,” Handy said.
Tom Rampone, VP and general manager for Intel’s NAND solutions group, pointed the announcement directly at the SSD opportunity. “This will help speed the adoption of solid-state drive solutions for computing,” he said.
The companies pointed out that the new 25-nm 8-GB device reduces chip count by 50 percent compared to previous process generations, allowing for smaller, yet higher density designs and greater cost efficiencies. For example, a 256-GB SSD can now be enabled with just 32 of these devices, versus 64 previously; a 32-GB smartphone needs just four; and a 16-GB flash card requires only two, Intel and Micron explained. The companies further noted that multiple 8-GB devices can be stacked in a package to increase storage capacity.
The 25-nm, 8-GB device is sampling now and is expected to enter mass production in Q2.
-
It may not be such a straightforward cost savings if they had to introduce immersion lithography to get to this step.
all wet - 2010-1-2 19:41:00 PST -
It may not be such a straightforward cost savings if they had to introduce immersion lithography to get to this step.
all wet - 2010-1-2 19:41:00 PST
