One-step graphene doping could enable graphene CMOS transistors
By Suzanne Deffree, Managing Editor -- EDN, March 18, 2010
Researchers at the Georgia Institute of Technology have claimed a one-step process that produces both N- and P-type doping of large-area graphene surfaces and that could facilitate the use of the material for future electronic devices. The doping technique, which the researchers produced by applying a commercially available SOG (spin-on-glass) material to graphene and then exposing it to electron-beam radiation, can also increase conductivity in graphene nanoribbons for interconnects.
The team created both types of doping by varying the exposure time to the e-beam radiation; higher levels of e-beam energy produce P-type areas, and lower levels produce N-type areas. The researchers used the technique to fabricate high-resolution PN junctions. When the team properly passivates the SOG, it creates doping that should remain indefinitely in the graphene sheets.
“This is a step toward making possible complementary-metal-oxide graphene transistors,” says Raghunath Murali, a senior research engineer in Georgia Tech’s Nanotechnology Research Center.
In the doping process, Murali and graduate student Kevin Brenner removed flakes of one- to four-layer-thick graphene from a block of graphite. Next, they placed the material onto a surface of oxidized silicon and fabricated a four-point contact device. They then spun on films of HSQ (hydrogen silsesquoxane) and cured certain portions of the resulting thin film using e-beam radiation. The technique provides precise control over the amount of radiation and where it is applied to the graphene; higher levels of energy correspond to more cross-linking of the HSQ.
“We gave varying doses of electron-beam radiation and then studied how it influenced the properties of carriers in the graphene lattice,” says Murali. “The e-beam gave us a fine range of control that could be valuable for fabricating nanoscale devices. We can use an electron beam with a diameter of 4 or 5 nm that allows very precise doping patterns.” Electronic measurements show that the technique creates a graphene PN junction with large energy separations, indicating strong doping effects.
Researchers elsewhere have demonstrated graphene doping using a variety of processes, including soaking the material in various solutions and exposing it to a variety of gases. Georgia Tech believes its process is the first to provide both electron (N-type) and hole (P-type) doping from a single dopant material. In the process, the doping introduces atoms of hydrogen and oxygen in the vicinity of the carbon lattice. The oxygen and hydrogen do not replace carbon atoms but instead occupy locations atop the lattice structure.
In volume manufacturing, a conventional lithography process would likely replace the e-beam radiation. Varying the reflectance or transmission of the mask set would control the amount of radiation reaching the SOG, and that variation would determine the creation of N- or P-type areas.
“Making everything in a single step would avoid some of the expensive lithography steps,” says Murali. “Gray-scale lithography would allow fine control of doping across the entire surface of the wafer.”
For doping bulk areas, such as interconnects, that require no patterning, the researchers coat the area with HSQ and expose it to a plasma source. The technique can make the nanoribbons as much as 10 times more conductive than untreated graphene. However, the researchers note that they require a better understanding of how the process works and whether other polymers might provide better results. “We need to have a better understanding of how to control this process because variability is one of the issues that must be controlled to make manufacturing feasible,” says Murali. “We are trying to identify other polymers that may provide better control or stronger doping levels.”
The Semiconductor Research Corp and the Defense Advanced Research Projects Agency through the Interconnect Focus Center supported the research, which a paper in Applied Physics Letters describes (Reference 1).
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This article originally appeared on Feb 17, 2010 in Electronics News, please click here to view that article.
