1G-sample/sec, 12-bit ADC works in base stations and instrumentation
By Paul Rako, Technical Editor -- EDN, November 10, 2009
Targeting applications in wireless-communications, defense, and test-and-measurement equipment, Texas Instruments recently announced the 12-bit, 1G-sample/sec ADS5400 ADC with 2.1-GHz input bandwidth. You can adjust the device’s gain, offset, and phase to interleave two or more ADCs to create a multigigabit-sample/second digitizer or to balance two ADCs in an I/Q (in-phase/quadrature) wireless receiver. You can select between single- or dual-bus DDR LVDS (low-voltage-differential-signaling) outputs.
The device offers an SNR (signal-to-noise ratio) of 59 dBFS (decibels below full-scale) and 75 dBc (decibels referenced to the carrier) SFDR (spurious-free dynamic range) in the first Nyquist frequency range. For intermediate frequencies beyond 1000 MHz, the SNR is 58 dBFS, and the SFDR is 70 dBc. The device has buffered analog inputs and an internal sample-and-hold circuit.
The ADS5400 comes in a 100-pin 16×16 mm TQFP package, operates over −40 to 85°C, and sells for $775 (1000). Samples and an evaluation board that is compatible with TI’s TSW1200EVM digital-capture card are available now.
