PCIe jammer provides inline-error injection
By Dan Strassberg, Contributing Technical Editor -- EDN, January 29, 2009
Agilent Technologies has introduced the N5323A Jammer inline-error-injection tool for PCIe (peripheral-component-interconnect-express) protocol testing. This unit allows you to shorten test cycles and improve time to market for peripheral and host devices. PCIe has become the interconnect technology of choice in high-performance applications, including servers, storage devices, peripherals, and graphics adapters. Designers of PCIe systems and devices face demands for more reliable systems that can interoperate with the rapidly increasing number of PCIe devices.
Agilent designed the N5323A to address these challenges. The half-size PCIe plug-in unit measures 6.6 in. long and 7.1 in high. It sits transparently between the host and a peripheral adapter and can modify PCIe data transfers in real time to create disruptive scenarios that increase test coverage. The unit performs these disruptive tests in live systems regardless of the operating system or application software.
You can program almost any error-recovery test case, including correctable and uncorrectable PCIe errors. With this approach, you can improve error handling and avoid costly last-minute product changes or recalls. Because of its transparency, setting up the unit is fast and easy. You need write no scripts; a graphical sequencer drives the error injections.
To seamlessly move from test to debug, the Jammer also works in conjunction with the manufacturer’s PCIe E2960B series protocol analyzer. The Jammer generates errors and can trigger the analyzer to capture and display the responses. This arrangement allows you to view traffic both before and after the error injection to ensure that your application invoked the appropriate recovery mechanism. Versions of the Jammer support PCIe implementations that have one, four or fewer, and eight or fewer lanes, as well as data rates of 2.5G and 5G transfers/sec. Prices start at $27,500.
