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What’s in your SAR-ADC application?

Driving a SAR ADC with an amplifier seems like a simple task. Not so fast. You are not finished until you accommodate the effects of the ADC-input charge injection on your amplifier.

By Bonnie Baker -- EDN, December 15, 2008

“Finding an amplifier that doesn’t tarnish an ADC’s performance is hard enough. But now you also have to deal with single-supply voltages and the quirky switched-capacitor input structure” (Reference 1). Engineers have been struggling with the task of driving the SAR (successive-approximation-register)-ADC, charge-redistribution, or C-DAC (capacitive-data-acquisition-converter) input architectures for more than a decade.

Driving a SAR ADC with an amplifier seems like a simple task. You choose an amplifier with a bandwidth that is appropriate for the input-signal requirements, then connect the amplifier directly to the ADC as a buffer. Not so fast. You are not finished until you accommodate the effects of the ADC-input charge injection on your amplifier (Figure 1). The transient currents at the input of the SAR ADC can disrupt the output of the amplifier so that the conversion process produces inaccurate digital results.

You model the input structure of the SAR ADC with a switch to an input capacitor, CSH, to ground (Figure 2). Prior to signal acquisition, the ADC S2 switch connects the power supply, voltage reference, or ground to precharge CSH. Your particular ADC topology determines this precharged voltage value. At the start of the signal-acquisition time, S2 opens and S1 closes. When S1 closes, the system injects charge onto or off of CSH, and the ADC takes a predetermined amount of time to acquire the signal. During this signal-acquisition time, the ADC requires ample charge from an input source to bring the system within a ½-LSB accuracy window.

Read all of Bonnie Baker's Baker's Best columns.

To design your circuit to perform accurately with the first pass, insert a resistor, RIN, and a capacitor, CIN, in the signal path between the amplifier and the ADC (Figure 2). The capacitor serves as a charge reservoir providing ample charge to the input capacitor of the ADC. RIN isolates the amplifier from CIN and stabilizes the amplifier (Reference 2). The combination of RIN and CIN at least needs to meet the ADC’s acquisition time (Reference 3). Finally, select your amplifier bandwidth to match the RINCIN time constant.

If you design your SAR-ADC circuit by simply driving the input of the converter with an amplifier, it may not produce good results. If you insert an RC pair between the amplifier and the SAR ADC, you will successfully charge your converter and design the quirks out of your circuit from the start.




References
  1. Swager, Anne Watson, “Evolving ADCs demand more from drive amplifiers,” EDN, Sep 29, 1994, pg 43.

  2. Green, Tim, “Operational Amplifier Stability, Part 3 of 15: RO and ROUT,” Analog Zone, 2005.

  3. Oljaca, Miro, and Bonnie Baker, “Start with the right op amp when driving SAR ADCs,” EDN, Oct 16, 2008.

Author Information
Bonnie Baker is a senior applications engineer at Texas Instruments. You can reach her at bonnie@ti.com.
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