Germanium-on-insulator materials have high hole mobility
By Ron Wilson, Executive Editor -- EDN, February 5, 2009
As device designers look beyond 22 nm, it is becoming clear that we are simply running out of carrier mobility. Strain engineering has helped a lot. By applying physical strain to the channel of a MOSFET, you can significantly increase the carrier mobility—enough at even 45 nm to make up for many of the other shortcomings of the device and end up with reasonable current. But many researchers now agree that, at some point, we will have to abandon silicon channels and move to a material with higher carrier mobility.
For holes, the most likely suspect today appears to be germanium, which has a higher intrinsic hole mobility than silicon. Engineers have begun to integrate germanium into CMOS processes—ironically enough, as a way to apply strain to silicon channels. Researchers are also exploring the process implications of forming transistor channels from germanium at small geometries, however.
That fact makes a recent report by IMEC (Interuniversity Microelectronics Center) an item of importance. IMEC researchers reported recently that they had fabricated SiGe (silicon-germanium) films on an SOI (silicon-on-insulator) substrate by a process of condensation. Specifically, the researchers created a SiGe film by epitaxial growth on the SOI. Then, in successive steps, they selectively oxidized the silicon atoms out of the lattice to obtain higher germanium concentration and annealed the resulting, thinner film. The result was a pure-crystal structure and high hole mobility—about twice what other researchers had reported for similar thicknesses of normal SOI material.
