Low-cost, high-I/O-count FPGAs target display market
By Michael Santarini, Senior Editor -- EDN, December 7, 2006
In an attempt to nab sockets in the market for low-cost, high-volume video displays, Xilinx has released an I/O-heavy version of its 90-nm Spartan-3 FPGAs. Before this release, Xilinx introduced a high-gate- and high-pin-count version of the device, the Spartan-3. The company then followed it up with a logic-heavy version, Spartan-3E. Now, the company is introducing its high-I/O-count Spartan-3A devices in an effort grab sockets in I/O-intensive applications, most notably the emerging video-display market in mainland China.
Mark Moran, senior strategic-marketing manager for the general products division at Xilinx, says that the new 3A devices excel as bridging functions, in deferential signaling, and as memory interfaces. Moran notes that, in many of today's applications, companies create one giant ASIC device for several product derivatives and then add functions and support to FPGAs in combination with the ASICs for new or emerging interfaces. Doing so allows users to keep the same footprint on a pc board but create derivatives or initiate field upgrades as needed.
To serve as bridging function, Xilinx ensured that the 3A support the most popular I/O standards, including PCI, PCIe, USB, CAN (controller-area-network), SPI, and I2C. To aid in differential signaling in displays, Xilinx has ensured that the device complies with both TMDS (transition-minimized differential signaling) and PPDS (point-to-point differential signaling). To help the larger chips adapt to the ever-growing and -changing memory world, Xilinx has added interfaces for DDR and DDR2 to Spartan-3A.
Spartan-3A devices include two hibernate modes: one for 40% static power reduction and one for 99% static-power reduction. Both modes have a wake-up time of less than 100 msec. The Spartan-3A also includes what Xilinx calls device DNA to help companies protect the designs they implement on FPGAs from piracy or cloning. "Device DNA is a unique serial number within each FPGA," says Moran. "We program it in at manufacturing time. Then, we allow the user to determine what authentication mechanism they want to use." Users can choose from several types of encryption mechanisms. They can change the authentication encryption at any time and even in the field. "You can change it from design model to design model, so, if you are concerned about cloning, you can change it however and whenever you want to," Moran says. "Because it is incorporated in the design, you can fix it, so when the design does not authenticate, you can stop the system from functioning by telling the system to turn off one or several global controls in the FPGA. If there is one thing FPGAs are not short on, it is global-control mechanisms."
You can also configure the authentication circuitry. "You can, for example, allow a contract manufacturer to access the full chip for test purposes for, say, eight minutes—enough time to test the chip in the context of the system but not enough time to copy the design," says Moran. "Now, you have the ability to stop cloning, reverse-engineering, and overbuilding."
Xilinx is shipping the 700,000-system-gate XC3S700A and the 1.4 million-system-gate XC3S1400A in samples and expects to begin full production expected in the first quarter of next year. The company plans to have the rest of its Spartan-3As in production by the second quarter of next year. The company also plans to offer 50,000-, 200,000-, and 400,000-gate versions. At production, prices for the XC3S700A and XC3S1400A devices will be $11.95 and $16.95 (250,000), respectively. Starter kits are available now for $199.
