AMD makes SSE5 x86 extension available to developers
By Colleen Taylor, Contributing Editor -- EDN, August 31, 2007
Advanced Micro Devices Inc. (AMD) on Thursday debuted an extension of the x86 instruction set that the company claims maximizes the performance of applications including high performance computing, multimedia and security applications.
The new specification, dubbed SSE5, is being made available to the developer community through AMD’s Web site and will be implemented in products based on AMD's next-generation "Bulldozer" core, which will be available in 2009. The company said that the new specifications are in an effort to pursue new approaches for performance-enhancement in response to what it said is the industry's shifting focus from processor speeds to power efficiency.
In a statement today, AMD said it was making SSE5's technical details available to the software developer community before its 2009 launch to "foster an industry dialogue and solicit feedback." SSE5 purportedly includes the ability to handle three operand instructions, as opposed to the previous generation's two and a "fused multiply accumulate" instruction, which combines multiplication and addition to enable iterative calculations with one instruction.
SSE, which debuted in 1999 and stands for streaming SIMD extensions, is a single instruction multiple data (SIMD) instruction set for the x86 architecture, designed to increase software performance through the use of special instructions that can operate on multiple pieces of data at one time.
In related news, AMD received a node from an independent research company today as besting Intel in 36 out of 57 power efficiency tests.
