Mixed-signal integration takes more than glue
Design Decisions: The Analog Devices team building a power-meter SOC faced architectural issues.
By Ron Wilson, Executive Editor -- EDN, October 11, 2006
Sometimes—often in the digital world—integration simply means putting the contents of last year's three chips onto one die. The larger transistor budget of a new process makes the combination affordable, and the IP at the RT level generally lends itself to reuse, so the new design becomes more a matter of a cost-reduction roadmap than any hard thinking about functions.
But in the analog/mixed-signal world, that isn't always the case. One recent example is the ADE7100/7500 power meter SOC (system on chip) from Analog Devices. Nominally, the new chip combines an existing mixed-signal power-metering IC, the ADE7753, with the 8052 external microcontroller that device required, forming a true single-chip design for residential power-metering applications. But under the skin, the design of the new chip turns out to involve more than just simply gluing a processor core (an 8052 in this case) and an LCD controller onto the 7753.
"This was not a straight integration play," explains Michael Ashburn, an Analog Devices analog design engineer. "We started out by asking ourselves what new features we might be enabling by putting these pieces together." The answers were fairly interesting.
Working in a low-voltage mixed-signal process, the team had access to a larger analog transistor budget than it had employed on the previous chip. Also, putting the 8052 core on the die meant that the chip could exert digital control over some functions that wouldn't have been within reach in the previous architecture.
This led to some new thinking about measurement. For starters, it meant adding a third ADC to design, so that the chip could measure voltage across the load and current in both the hot and neutral wires. The additional current measurement allowed firmware on the 8052 to detect current fault conditions that would indicate tampering with the meter.
The team also found it possible to add an elaborate battery-backup subsystem. Customers—primarily utility companies in Italy and in the developing world—obviously want the meter to not lose data during power failures. (Apparently, it's perfectly acceptable for the utility's customers to lose their data. But I digress.) Utilities also want to spend as little as possible for the meter system. This leads to designs that use a cheap non-rechargeable battery to back up the line-driven power supply. And it means that when the meter exhausts its battery, a truck must roll.
That fact, especially in countries that experience routine power losses, puts a premium on the ability of the chip to gracefully curtail its activity and enter an extremely low-current mode. This proved a major design issue, according to Ashburn.
The design team decided that neither the inefficiency nor the drop-out voltage of an on-chip regulator for the battery supply was acceptable, so the entire chip had to be designed to operate in its quiet mode over the whole range of possible battery voltages, including the end-of-life voltages for very cheap batteries. That, in turn, meant that the chip has to successfully enter its low-power state as power is going down, and stay there, napping, until power is restored. Fortunately, there was no necessity to make measurements from this state.
The team addressed these issues with the addition of even more mixed-signal circuitry: not only a sag detector, but also an early-warning detector that watches the voltage coming off of the line-powered DC supply before the regulator. And because a fresh battery could have a voltage above the 3.0V supply from the regulator, the designers accomplished switching between the two power sources with double-pole MOS blocking switches rather than with conventional means.
Another instance of added mixed-signal complexity covers a less obvious problem: the supply voltage for the LCD drivers. Typically, the system derives AC for the LCD segments from a voltage divider. But this technique can impose a DC offset voltage on the segments, which, as it turns out, has a negative impact on display life. So the ADI team chose to produce the segment-drive voltages with a charge pump.
Protecting all this circuitry from what is, in developing countries, an uncertain environment, proved to be another important challenge—one that the team couldn't solve by simply importing IP from other parts of the company. "The bulk of the lab time on this design actually went into surge protection, electrostatic discharge protection, and dealing with electrical fast transients [EFT]," Ashburn said. "These were the things that kept us up nights."
The team was able to lever its experience with previous board-level reference designs, in particular for the EFT problem. Ashburn said that in essence, you do the same things to control the impact of EFT in a chip that you do on a board: anywhere a fast change in current could cause electromagnetic radiation, you watch trace lengths, particularly for resistive paths. You keep critical inputs close to the edge of the board and of the chip. You use star grounds and pay careful attention to return paths.
One of the interesting wrinkles in this particular application is that international standards require that the meter not measure the energy contained in line pulses. (Apparently the voltage pulse that toasts your toaster should be free of charge.) This energy has to be removed from the measurement stream by a combination of sampling strategy and signal processing. Additionally, the team learned that at low sampling rates, aliasing from harmonics of the line frequency—not at all uncommon in haphazard physical plants—could cause short-term errors in energy measurements. So the device uses an 800-kHz sample rate and a 14-kHz signal bandwidth to measure a 60-Hz signal.
All told, the finished device is not at all the sum of the parts from which it was—nominally at least—integrated. It represents some IP reuse, plus a great deal of thought about what the feature set could be for a given transistor budget and set of user needs.
