Qualcomm plots fabless strategy for 45 nm
Company's course shows that the near future may be nearly bereft of fabless companies operating along familiar lines.
By Ron Wilson, Executive Editor -- EDN, November 21, 2006
The fabless semiconductor model has worked brilliantly for a wide range of companies over a number of process generations. But this success may have obscured an important limitation—that the model only works over a fairly narrow range of conditions, and that the industry is gradually shifting outside that range. In fact, the near future may be nearly bereft of fabless companies operating along familiar lines.
This possibility was illuminated in a meeting that staff members from Electronic News and EDN held recently with Behrooz Abdi, senior vice president and general manager at Qualcomm. Abdi described a company significantly departed from the traditional fabless model and still in the process of inventing its destination. Two major forces have driven this evolution, he says. First, Qualcomm's success in the handset market means that its future depends upon being able to ramp any new chip quickly to enormous volumes—a task too critical to bet on a single foundry. Second, the increasing complexity of developing a chip early in the life of a new semiconductor process has forced Qualcomm to learn far more about process technology than a fabless company ordinarily would.
To ensure rapid enough time-to-volume, Qualcomm employs a two-track strategy, Abdi explains. While continuing to develop chips for the company's traditional foundry partner, TSMC, Qualcomm now also develops in parallel for the Common Platform Alliance (CPA) foundries: IBM, Chartered Semiconductor, and Samsung. Ideally, the same design would tape out to both TSMC and the CPA foundries—which are nominally GDS-II compatible amongst themselves—at about the same time.
But that concept raises an immediate problem, particularly with the low margins available in the handset-chip market. Qualcomm cannot afford for the dual tapeouts to become two independent design projects. There must, as nearly as possible, be a single project, driven by a single process design kit, that splits off at the last minute into two nearly identical tapeouts.
This is not yet reality, Abdi acknowledges. For one thing, the IBM-led camp has adopted statistical static timing analysis as a preferred sign-off tool. TSMC has been much less enthusiastic about the statistical tool, preferring to rely on design rules to restrict the patterns on the die to ones with controllable variations, and then to handle the residual variations with margining. Abdi will not discuss how this can be resolved other than to say that IBM has become much more flexible on many issues recently.
The greater barrier would appear to be differences in device models, libraries, and design rules that could force Qualcomm to create two separate physical designs. But this part may be coming under control.
"At 45 nm, we are trying to get a single set of device models and a single set of design rules, at least for the logic cells," Abdi explains. "I think we can get to the point where we will have a common set of logic libraries, I/O libraries, and even analog blocks. But we will still have to swap a different set of memory macros into the design to move from one foundry team to the other."
The ability to work at this level with the foundries, negotiating models and restrictive design rules to keep pushing toward a common design platform, requires expertise far beyond traditional front-end and back-end design. Qualcomm has needed not only skilled physical-design experts and design-for-manufacturing people, but also experts in materials and processing equipment. "It's not enough to ask for something and hope the foundry can deliver it," Abdi says. "You have to have the expertise in-house to understand what the foundry is wrestling with and anticipate how far they can get, and how far you will have to go to help them."
This level of expertise—now visible with other early process adopters such as Altera and Xilinx, and always present at large integrated device manufacturers such as Intel and IBM—has paid off for Qualcomm, according to Abdi. The transition from 90 to 65 nm went so smoothly that it surprised the management team. The first 65-nm chips started sampling in April of this year, and the process went so well that the company is rapidly moving other products into the technology. "It went so quickly that we will end up having done only a few products in 90 nm," Abdi says.
One problem that hasn't gone away at 65 nm: timing closure. That issue consumed more time and effort than anticipated. "But then the chips are much more complicated, too," Abdi notes. "It's very hard to separate out how much of the added difficulty in timing closure is due to the process, how much is due to the more aggressive power management we are using at 65 nm, and how much of it is simply that we are doing harder designs."
Looking forward to 45 nm, Abdi remains optimistic. Qualcomm has been taping out test structures for about a year with both of its foundry tracks, and is currently up to full functional blocks such as phase-locked loops, memories, I/O cells, and data converters. But the next step in moving to 45 nm will require all of the company's internal areas of expertise, from process engineers to system architects, to work together.
The move to 45 nm will not provide another big increment in raw speed, Abdi says. Exploiting the technology will require changes in design at the architectural level—possibly dividing up critical tasks among multiple cores, for instance, or moving to more advanced interconnect-block schemes than traditional silicon-bus architectures. It will also require circuit and implementation changes, including new ideas in clocking algorithms, new ways to deal with supply voltage stability, and perhaps a whole new approach to on-chip memory organization. "Do we continue to proliferate small instances of memory arrays, each with its own overhead for test, repair and power management, or do we move toward shared central memory structures?" Abdi asks. "It's not clear yet."
With a level of internal expertise that makes it look like an IDM, intimate foundry relationships that must be maintained with two competing foundry groups, and increasing interaction between the process, circuit, architecture, and even software levels, Qualcomm is gradually coming to look very unlike the traditional, easily funded and easily managed fabless company. But it may be starting to resemble the future of the semiconductor industry.
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The US$3Billion Investment in Fab Facility in India has been delayed due to lack of proper industry frame-work. The promoters have demanded several fiscal concessions.
The Semi Conductor Policy is now scheduled to be released as Part of the Central Union Budget of India, on 28th February. More info: www.exclventures.com
Pramod Kiron - 2006-31-12 06:24:00 PST -
The proposed US$3 Billion investment in the first Large Scale Semiconductor Manufacturing Facility (FABCITY) in India would happen on a stretch of land along Srisailam Highway beside New Hyderabad Airport at Shamshabad. This offers opportunity to Companies like Qualcom, TI and others to make use of large package of incentives and tax breaks!
The progress of this investment is fully dependent on the Govt. of India's Policy for Semiconductor Fabrication. The Govt. had entered into agreement with Semindia for developing Fabcity in February 2006.
Semindia is a consortium of Non Resident Indians led by Technology Expert Mr. Vinod Agarwal. The Consortium has pulled in AMD which would be the Principal technology partner for Fabcity. Semindia has entered into agreements with Flextronics, IMEC-Belgium, BOC etc. Several Large agreements and contracts are expected to be finalized, as soon as Policy is released.
The Policy was to be announced soon after the signing of MOU in February, allowing Semindia to finance the equity and debt for the Project. However, the Govt. has been struggling to strike balance between expectations of the industry and possible loss of revenue due to incentives offered. Issue of technology obsolesce also has been raised.
Without clear guidelines and agreement / commitment on taxation, subsidies, incentives etc. the Financial Institutions and Investors would not come forward to commit funds. Hence, the soon to be released Policy, is the vital fulcrum on which the project would get founded.
Last few weeks has seen consistent reports from the Center, suggesting that the Policy would be released soon. A high powered technical committee headed by Mr. Ratan Tata had been working on the Policy. www.exclventures.com
The founding of FABCITY in Hyderabad is expected to result in explosive growth of technology led employment. Already golbal firms like Microsoft, IBM, Perot, Accenture, CA, HP, Templeton,Goldman Sachs, Google, Dell, Motorolla, Oracle, GE, Adobe, Sun, McAfee, Pacific, Unisys, USi, Cisco, Ericsson, Norton, Nokia, Sierra, Flextronics have set up offices at Hyderabad. The City has huge scope for expansion with gigantic investments planned in Guchibowli, Hitec, Manchirevula, Narsingi, Kokapet, Gandipet etc. The explosion in IT business activity has resulted in very large influx of professionals into Hyderabad making the real estate scene BOIL!
There are hundreds of NRIs and expatriates now working and buying luxurious properties. The upcoming international Airport, Express Highway to Airport, exploding growth in areas like Hitec City and Guchiboli have changed the face of the city!! Read more www.exclventures.com and monitor new projects including the GIGANTIC 90 Story Tower coming up in Hyderabad! Hyderabad is turning out to be the best spot for Global Investment.
www.exclventures.com - 2006-23-11 06:16:00 PST
