Video Design Idea: Diagnose setup and hold times in synchronous and asynchronous circuits
Metastability of digital circuits can become a problem if you don't properly account for setup and hold times in synchronous circuits, or at random in the case of asynchronous inputs.
By Staff -- EDN, October 18, 2007
| While metastability—an indeterminate state in a digital circuit—is far from a new topic, increasingly faster signal rates can put your design at greater disk to the phenomena. Certainly you should carefully design synchronous circuits for proper setup and hold times. In this video you will learn how to diagnose problematic setup and hold violations. And you'll learn about the probability of metastability caused by asynchronous inputs and how to minimize that probability in your designs.
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