Synopsys Donates Low-Power Technology
By Ann Steffora Mutschler -- EDN, September 19, 2006
Bringing its own brand of low power to the table, design software provider Synopsys Inc. said today it is donating its key power management technology to the EDA-focused Accellera standards organization.
Synopsys rival Cadence Design Systems Inc. launched a power management initiative of its own, Power Forward, this year to avoid going through the traditional standards process, which it believes is too slow.
Specifically, the Mountain View, Calif.-based EDA provider said it is donating power management commands, SystemVerilog constructs, VHDL constructs, and the Switching Activity Interchange Format (SAIF) to support the subcommittee's efforts.
Under the Unified Power Format (UPF) activities, the design community, EDA tool suppliers and standards bodies are working together to produce an open and inclusive standard for low power design by January 2007, Accellera noted.
The charter of the UPF technical subcommittee is to deliver a standard for low power design, similar to Cadence’s Power Forward goals.
“The donation by Synopsys to the Unified Power Format technical subcommittee is much appreciated and complements donations from other Accellera members,” Shrenik Mehta, Accellera chair said in a statement. “We look forward to delivering a standard based on industry-wide contributions that will quickly meet the demands of end-customers.”
