Intel Opens Next-Gen Instruction Sets
By Jessica Davis -- EDN, September 27, 2006
SAN FRANCISCO - Intel is releasing a next generation of about 50 architecture extensions that will be part of its 45 nanometer products.
Planned for the 2008 time frame, the new instruction sets are designed to speed up certain tasks such as media and string processing. The release will mark the first time Intel has opened such instruction sets.
Intel made the announcement during a keynote address here at the Intel Developers Forum by Pat Gelsinger, senior VP and general manager of the Intel Digital Enterprise Group.
Gelsinger dismissed questions about AMD gaining an edge by getting public access to the extensions, saying that is a natural consequence of taking the instruction sets public.
“We saw that we needed to be more open in partnering with the industry,” he said. “We are opening these for the ISV community to take advantage of.”
Called SSE4, Intel said the new extensions are the most significant since those released with Intel’s NetBurst microarchitecture, the predecessor to the current Core microarchitecture generation.
The instruction sets will be released with Intel’s 45nm processors, code-named Penryn. While Intel has not announced release dates for its 45nm processors, it has said that it is keeping to the two year schedule of scaling down to new process nodes. Intel announced a 45nm SRAM test chip in January. The company said the instructions would start to appear in 2008 in most of the volume market segments including desktop, mobile and server.
SSE4 will offer 50 instruction sets in two major categories: SSE4 Vectorizing Compiler and Media Accelerators, and SSE4 Efficient Accelerated String and Text Processing.
Further, Intel said that on-chip “Application Targeted Accelerators” can benefit specific applications. The first set of such accelerators will accelerate the cyclic redundancy check (CRC) of several data integrity applications, easing the bottleneck of off-chip CRCs. The second application-targeted extension provides single instruction, POPCNT, for accelerating searches involving large data sets.
Intel provided more details about the upcoming release in a newly released white paper.
