Lithography Becomes Big Bottleneck
By Ed Sperling -- EDN, June 6, 2006
By Ed Sperling
Burlingame, Calif. – The path to the 32-nanometer process node is clear, but the cost of getting there is about to go through the roof while the speed of turning out chips will slow down dramatically.
The culprit this time is lithography, and virtually everyone agrees the problem is not going to be solved easily or quickly. Instead of soft masks, European research groups such as IMEC and Crolles2 Alliance are suggesting metal hard masks. And instead of one pass on etching, there is now talk of two and three passes. All of this will greatly slow production.
What is particularly clear, and perhaps most daunting, is that top experts from around the globe don’t agree on how to get to the next step. Jeff Gambino, a member of the senior technical staff at IBM, doesn’t believe a hard mask is necessary. “A hard mask is extra cost and complexity,” he said, adding that manufacturers will have to get used to expensive delays in implementation until the next lithography tools are ready —- something that won’t happen anytime soon.
European researchers disagree, even though the solutions will greatly increase the cost. Christophe Verove, manager of the R&D Dry Etch and Stripping Group at Crolles2 Alliance, said the solution appears to be multiple exposures on thin hard masks and multiple etches. “Immersion will be necessary for 45 and 32 nanometers,” he said. “Lithography processes and tools are the major bottleneck.
What is becoming clear is that not all processes will work for all products -- a potentially thorny issue for chip designers. One size will not fit all, said Rudi Cartuyvels, department director for interconnect technology and technology options at IMEC. He said that hard masks will be needed to limit low-k patterning damage at future process nodes because the insulating material is so soft.
Cartuyvels noted that solutions such as double patterning are extremely complex. He said the overlay is particularly difficult. In addition, he said that processes such as immersion or extreme ultraviolet lithography likely will not be ready in time for the next nodes.
In most cases, these processes are simply in the testing phase. Jim Ryan, VP of technology at the Albany NanoTech center, said his group is experimenting with everything. “We have a very tough problem that we can address with some degree of success,” he said. “We’re placing our bets on immersion.”
So is TSMC, which is experimenting with both wet (immersion) and new types of dry lithography. “Whichever road we choose, it will be bumpy,” predicted Douglas Yu, senior director for the advanced module technology development division at TSMC. “But the approach will not be the same for everyone.”
Yu said customers will pay a lot for wet or dry technology. He noted that with wet technology, more of the onus is on the vendor, while with dry enhancement the onus is on the user. “It’s your decision about how much control you want and how much risk you’re willing to take,” he said. “Whichever option you take, wet and dry are compatible. Whichever approach you take, you can learn from it and apply to the other.”
Yu added that while companies talk about adding new dielectric materials into the mix to improve insulation capabilities at several atoms of thickness, working with any new materials is a challenge. He said that only adds to the complication of producing chips and increases the learning curve.
And no matter which approach is taken, the entire process may have to be revised. Perhaps even more far-reaching, it is likely to become part of the initial chip design if companies are to be successful at creating new chips. Farhad Moghadam, senior VP of the thin films process group at Applied Materials, said the process now has to include preparation as well as pattern transfer. “Patterning is more than printing,” he said. “Wet lithography has to be used at some point, and people will look at double exposure as a backup. But we still have a lot to learn about defects and the edge of the wafer.”
And finally, it remains to be seen just how quickly wafers are produced at the fab using new processes, or how expensive it becomes. Albany NanoTech’s Ryan says that some of the new lithography tools sell for $30 million to $50 million each.
