Global Designer: Logarithms: the new floating point?
By Graham Prophet, EDN Europe -- EDN, January 19, 2006
From the University of Newcastle upon Tyne spin-off Northern Digital comes a microprocessor whose maker claims to be the first to operate directly on numbers that are held in a logarithmic representation. The device targets applications that involve heavy computation loads and would essentially replace today's floating-point processors or coprocessors. Its designers say that it offers a performance gain in such mathematically intensive algorithms.
When designers represent numbers as logarithms, addition or subtraction carries out the multiplying or dividing of two numbers. Clearly, this approach offers the possibility of simplifying the multiplications that lie at the heart of many DSP or graphics algorithms. However, although multiplication and division are simpler, addition and subtraction become correspondingly more complex. According to Northern Digital, although others have considered the concept of a logarithmic processor, no one has thought it worthwhile to implement. By designing a computational architecture that overcomes this problem and efficiently carries out logarithmic addition and subtraction, the company has been able to demonstrate an overall gain in arithmetic performance.
Mathematics usually represents floating-point numbers as 8-bit exponents and 23-bit mantissas. Using the same register space, the equivalent logarithmic representation is an 8-bit integer part plus a 23-bit fractional part. The basic accuracy is the same; however, over the many repeated cycles that characterize computationally intensive tasks, accuracy improves over the floating-point case, because the number of rounding errors involved at each step, which accumulate as a calculation proceeds, decreases.
Northern Digital's processor uses slightly fewer machine cycles to carry out addition and subtraction than a conventional IEEE-754 floating-point unit. But, whereas a floating-point unit might complete a single multiplication or division in 30 or 40 cycles, the logarithmic processor needs only one. This factor underpins the company's assertion that the machine also suits advanced DSP and graphics algorithms: With a four-stage pipeline, the architecture has low latency.
In particular, the company says that the design will immediately and efficiently run emerging and experimental DSP algorithms without the effort that is often necessary to tune their code for a conventional floating-point machine.
The company has built a prototype in 0.18-micron CMOS, and this prototype runs at 125 MHz. It is available on an evaluation board that interfaces to a host system through a serial interface, which assembler software and a mathematical-function library backs up. The company is also developing a C compiler. Northern Digital intends to operate as both a fabless semiconductor company and an IP (intellectual-property) source.
Northern Digital, www.ncl.ac.uk.
