Power Forward Initiative Speeds Format Standardization
By Ann Steffora Mutschler -- EDN, September 5, 2006
In response to what Cadence Design Systems said is strong industry support to quickly establish a single, open standard for power intent, the EDA giant’s Power Forward Initiative (PFI) today said it has welcomed new member companies Calypto Design Systems, Golden Gate Technology and Sequence Design to support the standardization of the Common Power Format (CPF).
The Power Forward Initiative was formed in May to accelerate the broad adoption of a single power-intent standard, and has already submitted a project authorization request (PAR) to the Institute of Electrical and Electronics Engineers Inc. (IEEE) to form a working group.
Upon IEEE approval of the PAR, an IEEE Working Group will be formed to drive the standardization of the CPF, with each of the new participants expected to provide a member that will take an active role in the IEEE CPF Working Group.
“Successful standards need a broad user-based coalition,” said Jan Willis, senior VP of industry alliances at Cadence, in a statement.
“Fourteen companies are now involved in the creation of the Common Power Format and we are delighted that Gary Delp of LSI Logic has agreed to a chair position in the IEEE CPF Working Group,” she noted.
The CPF specification aims to link design, verification and implementation to reduce risk and increase predictability in chip power reduction through refinement of the CPF specification to capture all essential design intent for power and link the design, implementation and verification domains.
Participants in the Power Forward Initiative include Advanced Micro Devices, Applied Materials, ARM, ATI Technologies, Cadence Design Systems, Calypto Design Systems, Freescale Semiconductor, Fujitsu Limited, Golden Gate Technology, NEC Electronics Corp., Sequence Design, and Taiwan Semiconductor Manufacturing Company.
