Low-cost, high-signal-quality synthesized-clock generator replaces RF synthesizer in many applications
By Dan Strassberg -- EDN, April 14, 2005
Stanford Research Systems’ $2490 CG635 synthesized-clock generator provides precise, low-jitter digital-clock signals for applications ranging from digital-circuit design to communications-network testing. You can set the clock frequency from 0.001 Hz to 2.05 GHz (Picture). Rise and fall times are as short as 100 psec. Jitter is less than 1 psec rms. At 622.08 MHz, phase noise at a 100-Hz offset is below a –80-dBc/Hz level and the spurious response is below a –70-dBc level. Using the optional 10-MHz rubidium timebase, aging is less than 0.0005 ppm/year, and temperature instability is less than 0.0001 ppm.
You can set the CG635 outputs to standard logic levels, including CMOS, ECL (emitter-coupled logic), PECL (positive ECL), and LVDS (low-voltage differential signaling). Offset and amplitude can also be continuously adjusted between –5 and 5V. A rear-panel output delivers clocks at RS-485 and LVDS levels over twisted pairs. An optional PRBS (pseudorandom-binary-sequence) generator provides clock and data outputs at LVDS levels for testing serial-data channels. Edge-transition times are typically 80 psec.
The CG635’s standard crystal-oscillator timebase provides sufficient accuracy for many applications. To improve frequency stability and reduce aging, you can add an optional oven-stabilized crystal oscillator or rubidium frequency standard. You can also lock the CG635 to an external 10-MHz timebase.
Compared with a typical RF synthesizer, the CG635 has many similarities—excellent frequency resolution, low phase noise, and low spurious output levels. The new generator offers several advantages, however: output frequencies as low as 0.001 Hz, multiple square-wave outputs to 2.05 GHz, and much lower cost.
The Optional clock-receiver modules, which connect to the CG635 via Category 6 cable and may be a substantial distance from the instrument, provide complementary high-speed transitions at standard logic levels on SMA connectors.
Stanford Research Systems, 1-408-744-9040, www.thinksrs.com.
