EDN's 18th Annual Innovation Awards Finalists
-- EDN, February 1, 2008
|
&& PREVIOUS FINALIST | MAIN | NEXT FINALIST >> Category: EDA (PCB, FPGA, and Custom-IC Tools) WINNER: Sentinel-CPM power- and signal-integrity tool (Apache Design Solutions)  Power integrity continues to be one of the most critical design issue facing engineers today. At 90/65-nm technology nodes, the toughest power challenges were mainly associated with SOC (system-on-chip) designs, but as the process nodes move beyond 65 nm, the ability to address system-wide power integrity has become a key requirement. Systemwide power challenges need to consider power and noise of the SOC, IC package, and PCB as a whole, including their interaction and impact on overall system quality. What make true IC-Package co-design difficult are the competing requirements across multiple disciplines. For example, SOC designs are highly complex and require a tool that can handle the capacity and performance, whereas package/board designs require a tool that can handle full-wave broadband simulation, as well as understand the EMI effects.Apache claims the Sentinel-CPM is the industry’s first compact, spice-accurate model of the full-chip PDN (power-delivery network). It enables chip-package-board co-design and co-verification for dynamic power integrity and the package designers use it early in the design flow and throughout the entire process. During early design, package designers can take CPM based on floorplan data for more accurate and predictable package selection, as well as power-pad-to-signal-pin ratio and package-decoupling capacitance optimizations. Later in the flow, package designers use CPM based on detailed layout to accurately run power-integrity analysis of the package including the PDN behavior of the IC, to diagnose potential chip-package LC resonance issues, and to validate package/board dynamic voltage noise margin. Apache built Sentinel-CPM on its full-chip dynamic power signoff platform, and it delivers Spice-correlated accuracy along with orders-of-magnitude increase in runtime performance. CPM is Spice-compatible and contains parasitics of the nonlinear switching and nonswitching devices, as well as decoupling capacitance, loading capacitance, power/ground-coupling capacitance, and effective RCs. Both the current profile and the parasitic network are distributed across a multiple-terminal equivalent circuit to reflect their temporal and spatial nature. Sentinel-CPM is package-independent and uses the IC design database and library to generate a reduced-order model of the PDN in Spice format. It can handle both flip-chip and wire-bond package designs, as well as provide more accurate analysis for SIPs. See EDN’s coverage of Sentinel-CPM. |
|
Talkback
