TSMC uses Mentor Graphics’ Eldo for 40-nm cell library characterization
Since advanced process technologies require that more process corners be characterized for each cell to accurately represent the process variation and physical effects on the design, more cell variants are needed to accommodate different design considerations, such as cells for low power and cells for high speed.
By Ann Steffora Mutschler, Senior Editor -- EDN, August 12, 2008
To characterize cells in its 40-nm standard cell libraries, the world’s leading semiconductor foundry Taiwan Semiconductor Manufacturing Co Ltd (TSMC) said today it will use the Eldo analog simulation tool from Wilsonville, Ore-based chip design tool provider Mentor Graphics Corp.
The companies explained that advanced process technologies require that more process corners be characterized for each cell to accurately represent the process variation and physical effects on the design, with more cell variants needed to accommodate different design considerations, such as cells for low power and cells for high speed.
These advanced process technology requirements result in increased run time that must be mitigated by high performance SPICE simulation for library characterization, the companies concluded.
