Processor enables integration of high-end control- and data-plane processing
By Robert Cravotta, Technical Editor -- EDN, August 23, 2005
Cavium Networks’ Octeon Exp multicore MIPS64-based processor family enables designers to merge control- and data-plane processing at multigigabit/sec rates for enterprise- and storage-networking equipment in one device consuming fewer than 30W. The Octeon Exp offers as many as 16 dual-issue, memory-coherent, MIPS64 Release 2-based cores operating at 600 MHz. The processor architecture includes additional instructions for packet acceleration, and it incorporates a 32-kbyte instruction cache, an 8-kbyte data cache, a 32-entry TLB (translation-look-aside buffer), and a 2-kbyte write-back buffer. The Octeon Exp supports four to eight RGMII (reduced-gigabit media-independent-interface) ports or dual SPI-4.2 interfaces along with a host/slave 64-bit, 133-MHz PCI-X interface that can act as both a data and a control interface.
To support the throughput requirements for high-performance networking, the Octeon Exp integrates dedicated packet processors for layers 2, 3, and 4 parsing, error checking, tagging, and memory allocation. The Octeon Exp also includes a high-performance, on-chip memory controller that supports 144-bit-wide, ECC-protected DDR II DRAM that operates at an 800-Mbps data rate with capacity as large as 16 Gbytes. Two additional integrated memory interfaces support 18-bit-wide, low-latency RLDRAM (reduced-latency DRAM) 2 and FCRAM (fast-cycle RAM) 2 with low-latency access and a capacity of 1 Gbyte. Designers can use the two memory interfaces to connect TCAMs (ternary-content-addressable memory) for offloading look-ups to an external hardware device. For higher layer data-plane processing, Octeon includes dedicated hardware for TCP acceleration and flow management to scale performance across multiple cores.
T he software-programming environment is compatible with C/C ++ for MIPS64 and MIPS32 architectures, and it supports the Linux operating system. The Octeon Exp family comprises five devices that are available worldwide without any security-related export-control restrictions. The CN38xx family offers four, eight, 12, or 16 MIPS64-based cores in a footprint-compatible package. Production prices for the CN38xx family range from $350 to $650 (10,000). These devices are available for sampling today with software-development support that includes a simulator and reference applications.
