Power-supply interrupter fights ESD-induced device latch-up
Optoisolator-based circuit protects digital components from ESD.
Emerson Segura, Lifescale Global Diagnostics Inc, Toronto, ON, Canada; Edited by Brad Thompson and Fran Granville -- EDN, July 21, 2005
Under certain conditions, ESD events can damage digital circuits by causing latch-up. For example, when ESD triggers them, parasitic transistors normally formed as parts of a CMOS device can behave as an SCR (silicon-controlled rectifier). Once ESD triggers, the SCR presents a low-resistance path between portions of the CMOS device and conducts heavily. Damage to the device can result unless you immediately remove power from the circuit. ESD from human interaction presents a significant problem for mobile industrial and medical devices. For adequate ESD protection, most medical and industrial devices require a grounded return path for ESD currents. In the real world, mobile devices may serve in environments in which properly grounded power outlets are unavailable.
To protect expensive equipment from latch-up failures even when no ESD ground is present, you can add the power-interruption circuit shown in Figure 1 to prevent damage when ESD-induced latch-up occurs. Under normal conditions, current drawn by ESD-susceptible devices develops a small voltage across sense resistor R6. A voltage divider formed by R4 and R5 defines a reset-current threshold for the LED portion of optoisolator IC1, and, under normal operational current consumption, the LED remains dark.
The output of IC1 controls the gate bias applied to MOSFET Q1, which is normally on. When latch-up occurs, power-supply current drain rapidly increases by an order of magnitude or more. The large voltage drop developed across R6 forward-biases IC1's LED, which in turn drives IC1's phototransistor into conduction and shuts off Q1, interrupting dc power to ESD-susceptible devices for several milliseconds. In addition, the system's firmware design must allow for automatic recovery from a power interruption.
The following describes the relationship between the reset-current threshold and the values of R4 and R5: (R4+R5)/R4=(IT×R6)/VLED, in which IT≥(VLED)/R6, and VCC>VLED.
The ESD-induced fault threshold current, IT, is greater than or equal to the optoisolator LED's conducting forward-voltage drop divided by the value of sense resistor R6. Also, the raw power-supply voltage must exceed the LED's forward-voltage drop. Resistor R1 provides a path for IC1's base-leakage current, and resistors R3 and R2 determine Q1's gate-shutoff bias.
In Figure 1, the optoisolator presents an LED forward-voltage drop of 1.2V. For the component values shown, the circuit momentarily interrupts VCC when ESD-induced power-supply current exceeds approximately 300 mA. Total cost of the six resistors, one MOSFET, and one optoisolator is approximately $1 (production quantities).
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Thank you for publishing my Design Idea: "Power-supply interrupter fights ESD-induced device latch-up". I just read it online, and wanted to point out a small a typo in the schematic. In the original schematic I sent you R6 [Figure 1.] was 4.7 ohms, in the
schematic that I see on your website its 47K. I just wanted to bring that to your attention just in case other readers ask.
Emerson Segura - 2005-27-7 11:01:00 PDT -
I could not agree more with the previous comments on how poor this circuit is. Why on earth anyone would want to insert a current sense resistor of that magnitude that guarantees messing up the power supply regulation to the elements "down stream" is beyond me.
In my job, the cause of failure for this would be identified as "Design".
John Drummond - 2005-27-7 08:06:00 PDT -
Hi
The selection standards of design ideas seem to have fallen dramatically: how did such a worthless and poorly designed circuit ever come to be published: it does accumulate about every possible flaw imaginable for such a circuit: due to the threshold voltage of the MOS and the high sensing resistor, it will eat up at least 2.5V of the 5V supply, it will ruin the low impedance of the supply and will need an even higher voltage drop to begin to act.
In addition, due to the absence of clean foldback or power cycling mechanism, the logic will be left in an undeterminate condition, probably unable to recover by itself.
Add to that the needless complication, the use of an optocoupler when no isolation is required and you get the most likely candidate for the "dud of the year" award.
A single transistor current source could have performed the same function more simply and more cleanly (but wouldn't have been suitable either due to the objections mentionned).
Many manufacturers now offer smart high-side current sensors that could really do the job with some ingenuity on the part of the user.
It is a fact that not all DIs can be gems, and in general I tend to be indulgent, but really, this is over the top.
L. Vlemincq - 2005-26-7 23:53:00 PDT -
The ad that kept intruding on my concentration has no place in a
technical web site. Animated ads such as that is precisely why I
continue to prefer the print version of your magazine.
jud Williams - 2005-21-7 17:32:00 PDT
